sys/amd64/vmm/intel/vmx.c

3742

VLAPIC_CTR2(vlapic, msg " assert %s-triggered vector %d", \

sys/amd64/vmm/intel/vmx.c

4085

VLAPIC_CTR2(vlapic, "vmx_inject_pir: "

sys/amd64/vmm/io/vlapic.c

1057

VLAPIC_CTR2(vlapic, "icrlo 0x%016lx triggered ipi %d", icrval, vec);

sys/amd64/vmm/io/vlapic.c

1105

VLAPIC_CTR2(vlapic,

sys/amd64/vmm/io/vlapic.c

1451

VLAPIC_CTR2(vlapic, "vlapic read offset %#x, data %#lx", offset, *data);

sys/amd64/vmm/io/vlapic.c

1466

VLAPIC_CTR2(vlapic, "vlapic write offset %#lx, data %#lx",

sys/amd64/vmm/io/vlapic.c

1474

VLAPIC_CTR2(vlapic, "MMIO write of %#lx to offset %#lx "

sys/amd64/vmm/io/vlapic.c

1483

VLAPIC_CTR2(vlapic, "x2APIC MSR write of %#lx to offset %#lx "

sys/amd64/vmm/io/vlapic.c

1635

VLAPIC_CTR2(vlapic, "Changing APIC_BASE MSR from %#lx to %#lx "

sys/amd64/vmm/io/vlapic.c

224

VLAPIC_CTR2(vlapic, "vlapic ccr_timer = %#x, icr_timer = %#x",

sys/amd64/vmm/io/vlapic.c

240

VLAPIC_CTR2(vlapic, "vlapic dcr_timer=%#x, divisor=%d",

sys/amd64/vmm/io/vlapic.c

765

VLAPIC_CTR2(vlapic, "vlapic timer lagging by %lu "

sys/amd64/vmm/io/vlapic.c

914

VLAPIC_CTR2(vlapic, "vlapic TPR changed from %#x to %#x",