Symbol: VLAPIC_CTR1
sys/amd64/vmm/intel/vmx.c
3744
VLAPIC_CTR1(vlapic, msg " pir0 0x%016lx", pir_desc->pir[0]); \
sys/amd64/vmm/intel/vmx.c
3745
VLAPIC_CTR1(vlapic, msg " pir1 0x%016lx", pir_desc->pir[1]); \
sys/amd64/vmm/intel/vmx.c
3746
VLAPIC_CTR1(vlapic, msg " pir2 0x%016lx", pir_desc->pir[2]); \
sys/amd64/vmm/intel/vmx.c
3747
VLAPIC_CTR1(vlapic, msg " pir3 0x%016lx", pir_desc->pir[3]); \
sys/amd64/vmm/intel/vmx.c
3748
VLAPIC_CTR1(vlapic, msg " notify: %s", notify ? "yes" : "no"); \
sys/amd64/vmm/intel/vmx.c
3861
VLAPIC_CTR1(vlapic, "HLT with non-zero PPR %d", lapic->ppr);
sys/amd64/vmm/io/vlapic.c
1081
VLAPIC_CTR1(vlapic, "Ignoring invalid ICR %016lx", icrval);
sys/amd64/vmm/io/vlapic.c
1096
VLAPIC_CTR1(vlapic, "Ignoring invalid IPI %d", vec);
sys/amd64/vmm/io/vlapic.c
1114
VLAPIC_CTR1(vlapic,
sys/amd64/vmm/io/vlapic.c
1227
VLAPIC_CTR1(vlapic, "vlapic self-ipi %d", vec);
sys/amd64/vmm/io/vlapic.c
1251
VLAPIC_CTR1(vlapic, "pending intr %d", vector);
sys/amd64/vmm/io/vlapic.c
129
VLAPIC_CTR1(vlapic, "DFR in Unknown Model %#x", lapic->dfr);
sys/amd64/vmm/io/vlapic.c
1344
VLAPIC_CTR1(vlapic, "MMIO read from offset %#lx in x2APIC mode",
sys/amd64/vmm/io/vlapic.c
1354
VLAPIC_CTR1(vlapic, "x2APIC MSR read from offset %#lx in "
sys/amd64/vmm/io/vlapic.c
141
VLAPIC_CTR1(vlapic, "ignoring write to LDR in x2apic mode: %#x",
sys/amd64/vmm/io/vlapic.c
146
VLAPIC_CTR1(vlapic, "vlapic LDR set to %#x", lapic->ldr);
sys/amd64/vmm/io/vlapic.c
1786
VLAPIC_CTR1(vlapic, "Ignoring level trigger-mode for "
sys/amd64/vmm/io/vlapic.c
1797
VLAPIC_CTR1(vlapic, "vector %d set to level-triggered", vector);
sys/amd64/vmm/io/vlapic.c
277
VLAPIC_CTR1(vlapic, "vlapic is software disabled, ignoring "
sys/amd64/vmm/io/vlapic.c
285
VLAPIC_CTR1(vlapic, "vlapic ignoring interrupt to vector %d",
sys/amd64/vmm/io/vlapic.c
557
VLAPIC_CTR1(vlapic, "vlapic_update_ppr 0x%02x", ppr);
sys/amd64/vmm/io/vlapic.c
588
VLAPIC_CTR1(vlapic, "EOI vector %d", vector);
sys/amd64/vmm/io/vlapic.c
891
VLAPIC_CTR1(vlapic, "vlapic has bad logical "
sys/amd64/vmm/io/vlapic_priv.h
102
VLAPIC_CTR1((vlapic), msg " irr0 0x%08x", irrptr[0 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
103
VLAPIC_CTR1((vlapic), msg " irr1 0x%08x", irrptr[1 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
104
VLAPIC_CTR1((vlapic), msg " irr2 0x%08x", irrptr[2 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
105
VLAPIC_CTR1((vlapic), msg " irr3 0x%08x", irrptr[3 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
106
VLAPIC_CTR1((vlapic), msg " irr4 0x%08x", irrptr[4 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
107
VLAPIC_CTR1((vlapic), msg " irr5 0x%08x", irrptr[5 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
108
VLAPIC_CTR1((vlapic), msg " irr6 0x%08x", irrptr[6 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
109
VLAPIC_CTR1((vlapic), msg " irr7 0x%08x", irrptr[7 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
116
VLAPIC_CTR1((vlapic), msg " isr0 0x%08x", isrptr[0 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
117
VLAPIC_CTR1((vlapic), msg " isr1 0x%08x", isrptr[1 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
118
VLAPIC_CTR1((vlapic), msg " isr2 0x%08x", isrptr[2 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
119
VLAPIC_CTR1((vlapic), msg " isr3 0x%08x", isrptr[3 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
120
VLAPIC_CTR1((vlapic), msg " isr4 0x%08x", isrptr[4 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
121
VLAPIC_CTR1((vlapic), msg " isr5 0x%08x", isrptr[5 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
122
VLAPIC_CTR1((vlapic), msg " isr6 0x%08x", isrptr[6 << 2]); \
sys/amd64/vmm/io/vlapic_priv.h
123
VLAPIC_CTR1((vlapic), msg " isr7 0x%08x", isrptr[7 << 2]); \