VM_MEMATTR_WRITE_BACK
mode = VM_MEMATTR_WRITE_BACK;
bits = pmap_cache_bits(kernel_pmap, VM_MEMATTR_WRITE_BACK,
#define VM_MEMATTR_DEFAULT VM_MEMATTR_WRITE_BACK
mode = VM_MEMATTR_WRITE_BACK;
return (VM_MEMATTR_WRITE_BACK);
return (VM_MEMATTR_WRITE_BACK);
return (VM_MEMATTR_WRITE_BACK);
ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK) | contig | L2_BLOCK);
ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK) | contig | L3_PAGE);
ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK) |
m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
ATTR_KERN_GP | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK) | ATTR_S1_AP(ATTR_S1_AP_RW))
m->md.pv_memattr == VM_MEMATTR_WRITE_BACK &&
pmap != kernel_pmap && m->md.pv_memattr == VM_MEMATTR_WRITE_BACK) {
m->md.pv_memattr == VM_MEMATTR_WRITE_BACK)
m->md.pv_memattr == VM_MEMATTR_WRITE_BACK)
ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK) | L2_BLOCK);
VM_MEMATTR_WRITE_BACK);
VM_MEMATTR_WRITE_BACK);
case VM_MEMATTR_WRITE_BACK:
VM_MEMATTR_WRITE_BACK);
VM_MEMATTR_WRITE_BACK);
case ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK):
#define VM_MEMATTR_DEFAULT VM_MEMATTR_WRITE_BACK
MAIR_ATTR(MAIR_NORMAL_WB, VM_MEMATTR_WRITE_BACK) |
return (-pmap_change_attr(addr, len, VM_MEMATTR_WRITE_BACK));
pmap_page_set_memattr(page, VM_MEMATTR_WRITE_BACK);
_ioremap_attr((addr), (size), VM_MEMATTR_WRITE_BACK)
pmap_change_attr(va, size, VM_MEMATTR_WRITE_BACK);
{ VM_MEMATTR_WRITE_BACK, "cache-enabled part" },
VM_MEMATTR_WRITE_BACK : ttm_io_prot(bo->mem.placement));
return (VM_MEMATTR_WRITE_BACK);
pmap_page_set_memattr(pages[i], VM_MEMATTR_WRITE_BACK);
pmap_page_set_memattr(p, VM_MEMATTR_WRITE_BACK);
return (VM_MEMATTR_WRITE_BACK);
case VM_MEMATTR_WRITE_BACK:
mode = VM_MEMATTR_WRITE_BACK;
#define VM_MEMATTR_DEFAULT VM_MEMATTR_WRITE_BACK
case VM_MEMATTR_WRITE_BACK:
case VM_MEMATTR_WRITE_BACK:
case VM_MEMATTR_WRITE_BACK:
case VM_MEMATTR_WRITE_BACK:
*memattr = VM_MEMATTR_WRITE_BACK;
case VM_MEMATTR_WRITE_BACK:
#define VM_MEMATTR_XEN VM_MEMATTR_WRITE_BACK
#ifdef VM_MEMATTR_WRITE_BACK
MEMATTR_STR(VM_MEMATTR_WRITE_BACK, "WB")