sys/arm64/vmm/io/vgic_v3.c

251

VGIC_REGISTER(GICD_CTLR, 4, VGIC_32_BIT, dist_ctlr_read,

sys/arm64/vmm/io/vgic_v3.c

253

VGIC_REGISTER(GICD_TYPER, 4, VGIC_32_BIT, dist_typer_read,

sys/arm64/vmm/io/vgic_v3.c

255

VGIC_REGISTER(GICD_IIDR, 4, VGIC_32_BIT, dist_iidr_read,

sys/arm64/vmm/io/vgic_v3.c

257

VGIC_REGISTER_RAZ_WI(GICD_STATUSR, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

258

VGIC_REGISTER(GICD_SETSPI_NSR, 4, VGIC_32_BIT, gic_zero_read,

sys/arm64/vmm/io/vgic_v3.c

260

VGIC_REGISTER(GICD_CLRSPI_NSR, 4, VGIC_32_BIT, gic_zero_read,

sys/arm64/vmm/io/vgic_v3.c

262

VGIC_REGISTER_RAZ_WI(GICD_SETSPI_SR, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

263

VGIC_REGISTER_RAZ_WI(GICD_CLRSPI_SR, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

265

VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

267

VGIC_REGISTER_RAZ_WI(GICD_ISENABLER(0), 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

269

VGIC_32_BIT, dist_isenabler_read, dist_isenabler_write),

sys/arm64/vmm/io/vgic_v3.c

271

VGIC_REGISTER_RAZ_WI(GICD_ICENABLER(0), 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

273

VGIC_32_BIT, dist_icenabler_read, dist_icenabler_write),

sys/arm64/vmm/io/vgic_v3.c

275

VGIC_REGISTER_RAZ_WI(GICD_ISPENDR(0), 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

277

VGIC_32_BIT, dist_ispendr_read, dist_ispendr_write),

sys/arm64/vmm/io/vgic_v3.c

279

VGIC_REGISTER_RAZ_WI(GICD_ICPENDR(0), 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

281

VGIC_32_BIT, dist_icpendr_read, dist_icpendr_write),

sys/arm64/vmm/io/vgic_v3.c

283

VGIC_REGISTER_RAZ_WI(GICD_ISACTIVER(0), 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

285

VGIC_32_BIT, dist_isactiver_read, dist_isactiver_write),

sys/arm64/vmm/io/vgic_v3.c

287

VGIC_REGISTER_RAZ_WI(GICD_ICACTIVER(0), 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

289

VGIC_32_BIT, dist_icactiver_read, dist_icactiver_write),

sys/arm64/vmm/io/vgic_v3.c

292

VGIC_32_BIT | VGIC_8_BIT),

sys/arm64/vmm/io/vgic_v3.c

294

VGIC_32_BIT | VGIC_8_BIT, dist_ipriorityr_read,

sys/arm64/vmm/io/vgic_v3.c

298

VGIC_32_BIT | VGIC_8_BIT),

sys/arm64/vmm/io/vgic_v3.c

301

VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

303

VGIC_32_BIT, dist_icfgr_read, dist_icfgr_write),

sys/arm64/vmm/io/vgic_v3.c

310

VGIC_REGISTER_RAZ_WI(GICD_SGIR, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

320

VGIC_64_BIT | VGIC_32_BIT, dist_irouter_read, dist_irouter_write),

sys/arm64/vmm/io/vgic_v3.c

322

VGIC_REGISTER_RANGE_RAZ_WI(GICD_PIDR4, GICD_PIDR2, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

323

VGIC_REGISTER(GICD_PIDR2, 4, VGIC_32_BIT, gic_pidr2_read,

sys/arm64/vmm/io/vgic_v3.c

325

VGIC_REGISTER_RANGE_RAZ_WI(GICD_PIDR2 + 4, GICD_SIZE, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

345

VGIC_REGISTER(GICR_CTLR, 4, VGIC_32_BIT, redist_ctlr_read,

sys/arm64/vmm/io/vgic_v3.c

347

VGIC_REGISTER(GICR_IIDR, 4, VGIC_32_BIT, redist_iidr_read,

sys/arm64/vmm/io/vgic_v3.c

349

VGIC_REGISTER(GICR_TYPER, 8, VGIC_64_BIT | VGIC_32_BIT,

sys/arm64/vmm/io/vgic_v3.c

351

VGIC_REGISTER_RAZ_WI(GICR_STATUSR, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

352

VGIC_REGISTER_RAZ_WI(GICR_WAKER, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

353

VGIC_REGISTER_RAZ_WI(GICR_SETLPIR, 8, VGIC_64_BIT | VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

354

VGIC_REGISTER_RAZ_WI(GICR_CLRLPIR, 8, VGIC_64_BIT | VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

355

VGIC_REGISTER_RAZ_WI(GICR_PROPBASER, 8, VGIC_64_BIT | VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

356

VGIC_REGISTER_RAZ_WI(GICR_PENDBASER, 8, VGIC_64_BIT | VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

357

VGIC_REGISTER_RAZ_WI(GICR_INVLPIR, 8, VGIC_64_BIT | VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

358

VGIC_REGISTER_RAZ_WI(GICR_INVALLR, 8, VGIC_64_BIT | VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

359

VGIC_REGISTER_RAZ_WI(GICR_SYNCR, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

362

VGIC_REGISTER_RANGE_RAZ_WI(GICD_PIDR4, GICD_PIDR2, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

363

VGIC_REGISTER(GICD_PIDR2, 4, VGIC_32_BIT, gic_pidr2_read,

sys/arm64/vmm/io/vgic_v3.c

366

VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

396

VGIC_REGISTER_RAZ_WI(GICR_IGROUPR0, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

397

VGIC_REGISTER(GICR_ISENABLER0, 4, VGIC_32_BIT, redist_ienabler0_read,

sys/arm64/vmm/io/vgic_v3.c

399

VGIC_REGISTER(GICR_ICENABLER0, 4, VGIC_32_BIT, redist_ienabler0_read,

sys/arm64/vmm/io/vgic_v3.c

401

VGIC_REGISTER(GICR_ISPENDR0, 4, VGIC_32_BIT, redist_ipendr0_read,

sys/arm64/vmm/io/vgic_v3.c

403

VGIC_REGISTER(GICR_ICPENDR0, 4, VGIC_32_BIT, redist_ipendr0_read,

sys/arm64/vmm/io/vgic_v3.c

405

VGIC_REGISTER(GICR_ISACTIVER0, 4, VGIC_32_BIT, redist_iactiver0_read,

sys/arm64/vmm/io/vgic_v3.c

407

VGIC_REGISTER(GICR_ICACTIVER0, 4, VGIC_32_BIT, redist_iactiver0_read,

sys/arm64/vmm/io/vgic_v3.c

410

VGIC_32_BIT | VGIC_8_BIT, redist_ipriorityr_read,

sys/arm64/vmm/io/vgic_v3.c

412

VGIC_REGISTER_RAZ_WI(GICR_ICFGR0, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

413

VGIC_REGISTER(GICR_ICFGR1, 4, VGIC_32_BIT, redist_icfgr1_read,

sys/arm64/vmm/io/vgic_v3.c

415

VGIC_REGISTER_RAZ_WI(GICR_IGRPMODR0, 4, VGIC_32_BIT),

sys/arm64/vmm/io/vgic_v3.c

416

VGIC_REGISTER_RAZ_WI(GICR_NSACR, 4, VGIC_32_BIT),