TYPE_01
TYPE_01, 0 }, /* add shifted register */
TYPE_01, OP_RD_SP | OP_RN_SP }, /* mov (to/from sp) */
TYPE_01, OP_RD_SP | OP_RN_SP }, /* add immediate */
TYPE_01, 0 }, /* cmn shifted register */
TYPE_01, 0 }, /* adds shifted register */
TYPE_01, 0 }, /* neg shifted register */
TYPE_01, 0 }, /* sub shifted register */
TYPE_01, 0 }, /* cmp shifted register */
TYPE_01, 0 }, /* negs shifted register */
TYPE_01, 0 }, /* subs shifted register */
TYPE_01, OP_SHIFT_ROR }, /* mvn shifted register */
TYPE_01, OP_SHIFT_ROR }, /* orn shifted register */
TYPE_01, 0 }, /* mov register */
TYPE_01, OP_SHIFT_ROR }, /* orr shifted register */
TYPE_01, OP_SHIFT_ROR }, /* and shifted register */
TYPE_01, OP_SHIFT_ROR }, /* tst shifted register */
TYPE_01, OP_SHIFT_ROR }, /* ands shifted register */
TYPE_01, OP_SHIFT_ROR }, /* bic shifted register */
TYPE_01, OP_SHIFT_ROR }, /* bics shifted register */
TYPE_01, OP_SHIFT_ROR }, /* eon shifted register */
TYPE_01, OP_SHIFT_ROR }, /* eor shifted register */
case TYPE_01: