UPHY_PLL_P0_CTL2_PLL0_CAL_CTRL
reg &= ~UPHY_PLL_P0_CTL2_PLL0_CAL_CTRL(~0);
reg |= UPHY_PLL_P0_CTL2_PLL0_CAL_CTRL(0x136);
reg &= ~UPHY_PLL_P0_CTL2_PLL0_CAL_CTRL(~0);
reg |= UPHY_PLL_P0_CTL2_PLL0_CAL_CTRL(0x136);