sys/arm/qualcomm/ipq4018_machdep.c

169

volatile uint32_t * UART_DM_SR = (uint32_t *)(UART_BASE + 0x08);

sys/arm/qualcomm/ipq4018_machdep.c

192

if ((*UART_DM_SR & UART_DM_SR_TXEMT) == 0) {

sys/arm/qualcomm/ipq4018_machdep.c

206

while (((*UART_DM_SR & UART_DM_SR_TXRDY) == 0) && --limit) {

sys/dev/uart/uart_dev_msm.c

233

if (!(uart_getreg(bas, UART_DM_SR) & UART_DM_SR_TXEMT)) {

sys/dev/uart/uart_dev_msm.c

243

while ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_TXRDY) == 0)

sys/dev/uart/uart_dev_msm.c

255

return ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) ==

sys/dev/uart/uart_dev_msm.c

267

while ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) !=

sys/dev/uart/uart_dev_msm.c

272

if (uart_getreg(bas, UART_DM_SR) & UART_DM_SR_UART_OVERRUN)

sys/dev/uart/uart_dev_msm.c

412

while (uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) {