crypto/krb5/src/lib/crypto/builtin/sha2/sha256.c

124

uint32_t AA, BB, CC, DD, EE, FF, GG, HH;

crypto/krb5/src/lib/crypto/builtin/sha2/sha256.c

128

AA = A;

crypto/krb5/src/lib/crypto/builtin/sha2/sha256.c

147

T2 = Sigma0(AA) + Maj(AA,BB,CC);

crypto/krb5/src/lib/crypto/builtin/sha2/sha256.c

155

BB = AA;

crypto/krb5/src/lib/crypto/builtin/sha2/sha256.c

156

AA = T1 + T2;

crypto/krb5/src/lib/crypto/builtin/sha2/sha256.c

159

A += AA;

crypto/krb5/src/lib/crypto/builtin/sha2/sha512.c

132

uint64_t AA, BB, CC, DD, EE, FF, GG, HH;

crypto/krb5/src/lib/crypto/builtin/sha2/sha512.c

136

AA = A;

crypto/krb5/src/lib/crypto/builtin/sha2/sha512.c

155

T2 = Sigma0(AA) + Maj(AA,BB,CC);

crypto/krb5/src/lib/crypto/builtin/sha2/sha512.c

163

BB = AA;

crypto/krb5/src/lib/crypto/builtin/sha2/sha512.c

164

AA = T1 + T2;

crypto/krb5/src/lib/crypto/builtin/sha2/sha512.c

167

A += AA;

lib/libc/stdlib/a64l.c

35

else if (*s <= AA + 25)

lib/libc/stdlib/a64l.c

36

digit = *s - AA + 12;

sys/arm/nvidia/tegra_pinmux.c

281

GMUX(0x260, AA, 0, sdmmc4_dat0_paa0, sdmmc4, spi3, gmi, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

282

GMUX(0x264, AA, 1, sdmmc4_dat1_paa1, sdmmc4, spi3, gmi, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

283

GMUX(0x268, AA, 2, sdmmc4_dat2_paa2, sdmmc4, spi3, gmi, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

284

GMUX(0x26C, AA, 3, sdmmc4_dat3_paa3, sdmmc4, spi3, gmi, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

285

GMUX(0x270, AA, 4, sdmmc4_dat4_paa4, sdmmc4, spi3, gmi, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

286

GMUX(0x274, AA, 5, sdmmc4_dat5_paa5, sdmmc4, spi3, rsvd3, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

287

GMUX(0x278, AA, 6, sdmmc4_dat6_paa6, sdmmc4, spi3, gmi, rsvd4),

sys/arm/nvidia/tegra_pinmux.c

288

GMUX(0x27C, AA, 7, sdmmc4_dat7_paa7, sdmmc4, rsvd2, gmi, rsvd4),

sys/arm64/nvidia/tegra210/tegra210_pinmux.c

325

GMUX(0x134, AA, 0, dap2_fs_paa0, i2s2, rsvd1, rsvd2, rsvd3, 0x96c, 0, 0, 0, 0),

sys/arm64/nvidia/tegra210/tegra210_pinmux.c

326

GMUX(0x138, AA, 2, dap2_din_paa2, i2s2, rsvd1, rsvd2, rsvd3, 0x964, 0, 0, 0, 0),

sys/arm64/nvidia/tegra210/tegra210_pinmux.c

327

GMUX(0x13c, AA, 3, dap2_dout_paa3, i2s2, rsvd1, rsvd2, rsvd3, 0x968, 0, 0, 0, 0),

sys/arm64/nvidia/tegra210/tegra210_pinmux.c

328

GMUX(0x140, AA, 1, dap2_sclk_paa1, i2s2, rsvd1, rsvd2, rsvd3, 0x970, 0, 0, 0, 0),