sys/arm/ti/ti_spi.c

109

reg = TI_SPI_READ(sc, MCSPI_STAT_CH(i));

sys/arm/ti/ti_spi.c

113

reg = TI_SPI_READ(sc, MCSPI_XFERLEVEL);

sys/arm/ti/ti_spi.c

139

reg = TI_SPI_READ(sc, MCSPI_CTRL_CH(ch));

sys/arm/ti/ti_spi.c

144

reg = TI_SPI_READ(sc, MCSPI_CONF_CH(ch));

sys/arm/ti/ti_spi.c

220

while (!(TI_SPI_READ(sc, MCSPI_SYSSTATUS) &

sys/arm/ti/ti_spi.c

232

rev = TI_SPI_READ(sc,

sys/arm/ti/ti_spi.c

322

while (--timeout > 0 && (TI_SPI_READ(sc,

sys/arm/ti/ti_spi.c

355

while (--timeout > 0 && (TI_SPI_READ(sc,

sys/arm/ti/ti_spi.c

362

data[read] = TI_SPI_READ(sc, MCSPI_RX_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

376

status = TI_SPI_READ(sc, MCSPI_IRQSTATUS);

sys/arm/ti/ti_spi.c

490

reg = TI_SPI_READ(sc, MCSPI_CONF_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

501

reg = TI_SPI_READ(sc, MCSPI_IRQENABLE);

sys/arm/ti/ti_spi.c

507

reg = TI_SPI_READ(sc, MCSPI_CTRL_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

511

reg = TI_SPI_READ(sc, MCSPI_CONF_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

519

reg = TI_SPI_READ(sc, MCSPI_CONF_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

524

reg = TI_SPI_READ(sc, MCSPI_IRQENABLE);

sys/arm/ti/ti_spi.c

530

reg = TI_SPI_READ(sc, MCSPI_CTRL_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

535

reg = TI_SPI_READ(sc, MCSPI_CONF_CH(sc->sc_cs));

sys/arm/ti/ti_spi.c

83

reg = TI_SPI_READ(sc, MCSPI_SYSCONFIG);

sys/arm/ti/ti_spi.c

85

reg = TI_SPI_READ(sc, MCSPI_SYSSTATUS);

sys/arm/ti/ti_spi.c

87

reg = TI_SPI_READ(sc, MCSPI_IRQSTATUS);

sys/arm/ti/ti_spi.c

89

reg = TI_SPI_READ(sc, MCSPI_IRQENABLE);

sys/arm/ti/ti_spi.c

91

reg = TI_SPI_READ(sc, MCSPI_MODULCTRL);

sys/arm/ti/ti_spi.c

94

ctrl = TI_SPI_READ(sc, MCSPI_CTRL_CH(i));

sys/arm/ti/ti_spi.c

95

conf = TI_SPI_READ(sc, MCSPI_CONF_CH(i));