sys/arm/ti/ti_spi.c

142

TI_SPI_WRITE(sc, MCSPI_CTRL_CH(ch), reg);

sys/arm/ti/ti_spi.c

146

TI_SPI_WRITE(sc, MCSPI_CONF_CH(ch), reg | conf);

sys/arm/ti/ti_spi.c

218

TI_SPI_WRITE(sc, MCSPI_SYSCONFIG, MCSPI_SYSCONFIG_SOFTRESET);

sys/arm/ti/ti_spi.c

244

TI_SPI_WRITE(sc, MCSPI_MODULCTRL, MCSPI_MODULCTRL_SINGLE);

sys/arm/ti/ti_spi.c

247

TI_SPI_WRITE(sc, MCSPI_IRQENABLE, 0x0);

sys/arm/ti/ti_spi.c

248

TI_SPI_WRITE(sc, MCSPI_IRQSTATUS, 0xffff);

sys/arm/ti/ti_spi.c

255

TI_SPI_WRITE(sc, MCSPI_CONF_CH(i),

sys/arm/ti/ti_spi.c

285

TI_SPI_WRITE(sc, MCSPI_IRQENABLE, 0);

sys/arm/ti/ti_spi.c

286

TI_SPI_WRITE(sc, MCSPI_IRQSTATUS, 0xffff);

sys/arm/ti/ti_spi.c

289

TI_SPI_WRITE(sc, MCSPI_SYSCONFIG, MCSPI_SYSCONFIG_SOFTRESET);

sys/arm/ti/ti_spi.c

329

TI_SPI_WRITE(sc, MCSPI_TX_CH(sc->sc_cs), data[written]);

sys/arm/ti/ti_spi.c

390

TI_SPI_WRITE(sc, MCSPI_IRQSTATUS, status);

sys/arm/ti/ti_spi.c

487

TI_SPI_WRITE(sc, MCSPI_XFERLEVEL, 0);

sys/arm/ti/ti_spi.c

497

TI_SPI_WRITE(sc, MCSPI_CONF_CH(sc->sc_cs), reg);

sys/arm/ti/ti_spi.c

503

TI_SPI_WRITE(sc, MCSPI_IRQENABLE, reg);

sys/arm/ti/ti_spi.c

508

TI_SPI_WRITE(sc, MCSPI_CTRL_CH(sc->sc_cs), reg | MCSPI_CTRL_ENABLE);

sys/arm/ti/ti_spi.c

512

TI_SPI_WRITE(sc, MCSPI_CONF_CH(sc->sc_cs), reg |= MCSPI_CONF_FORCE);

sys/arm/ti/ti_spi.c

521

TI_SPI_WRITE(sc, MCSPI_CONF_CH(sc->sc_cs), reg);

sys/arm/ti/ti_spi.c

526

TI_SPI_WRITE(sc, MCSPI_IRQENABLE, reg);

sys/arm/ti/ti_spi.c

527

TI_SPI_WRITE(sc, MCSPI_IRQSTATUS, 0xf);

sys/arm/ti/ti_spi.c

532

TI_SPI_WRITE(sc, MCSPI_CTRL_CH(sc->sc_cs), reg);

sys/arm/ti/ti_spi.c

537

TI_SPI_WRITE(sc, MCSPI_CONF_CH(sc->sc_cs), reg);