BMCR_PDOWN
MII_BMCR, BMCR_PDOWN);
MII_BMCR, BMCR_PDOWN);
MII_BMCR, BMCR_ISO | BMCR_PDOWN);
BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, BMCR_PDOWN,
off ? BMCR_PDOWN : 0);
if ((v & BMCR_PDOWN) == 0)
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
enable ? BMCR_PDOWN : 0);
err = t3_mdio_change_bits(phy, mmd, MII_BMCR, BMCR_PDOWN, BMCR_RESET);
BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
enable ? BMCR_PDOWN : 0);
if (data & BMCR_PDOWN)
jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, BMCR_PDOWN);
bmcr &= ~BMCR_PDOWN;
if (reg & (BMCR_ISO | BMCR_PDOWN))
PHY_WRITE(sc, MII_BMCR, reg & ~(BMCR_ISO | BMCR_PDOWN));
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
reg &= ~(BMCR_PDOWN | BMCR_ISO);
PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN);
if (val & BMCR_PDOWN) {
val &= ~BMCR_PDOWN;
BMCR_PDOWN);