sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2719

{ GEN_MSGU_IBDB_SET, PCIBAR0, MSGU_IBDB_SET, SIZE_DW }, /* 0x00 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2720

{ GEN_MSGU_ODR, PCIBAR0, MSGU_ODR, SIZE_DW }, /* 0x01 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2721

{ GEN_MSGU_ODCR, PCIBAR0, MSGU_ODCR, SIZE_DW }, /* 0x02 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2722

{ GEN_MSGU_SCRATCH_PAD_0, PCIBAR0, MSGU_SCRATCH_PAD_0, SIZE_DW }, /* 0x03 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2723

{ GEN_MSGU_SCRATCH_PAD_1, PCIBAR0, MSGU_SCRATCH_PAD_1, SIZE_DW }, /* 0x04 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2724

{ GEN_MSGU_SCRATCH_PAD_2, PCIBAR0, MSGU_SCRATCH_PAD_2, SIZE_DW }, /* 0x05 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2725

{ GEN_MSGU_SCRATCH_PAD_3, PCIBAR0, MSGU_SCRATCH_PAD_3, SIZE_DW }, /* 0x06 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2726

{ GEN_MSGU_HOST_SCRATCH_PAD_0, PCIBAR0, MSGU_HOST_SCRATCH_PAD_0, SIZE_DW }, /* 0x07 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2727

{ GEN_MSGU_HOST_SCRATCH_PAD_1, PCIBAR0, MSGU_HOST_SCRATCH_PAD_1, SIZE_DW }, /* 0x08 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2728

{ GEN_MSGU_HOST_SCRATCH_PAD_2, PCIBAR0, MSGU_HOST_SCRATCH_PAD_2, SIZE_DW }, /* 0x09 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2729

{ GEN_MSGU_HOST_SCRATCH_PAD_3, PCIBAR0, MSGU_HOST_SCRATCH_PAD_3, SIZE_DW }, /* 0x0a */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2730

{ GEN_MSGU_ODMR, PCIBAR0, MSGU_ODMR, SIZE_DW }, /* 0x0b */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2731

{ GEN_PCIE_TRIGGER, PCIBAR0, PCIE_TRIGGER_ON_REGISTER_READ, SIZE_DW }, /* 0x0c */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2732

{ GEN_SPC_REG_RESET, PCIBAR2, SPC_REG_RESET, SIZE_DW }, /* 0x0d */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2738

{ GEN_MSGU_IBDB_SET, PCIBAR0, V_Inbound_Doorbell_Set_Register, SIZE_DW }, /* 0x00 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2739

{ GEN_MSGU_ODR, PCIBAR0, V_Outbound_Doorbell_Set_Register, SIZE_DW }, /* 0x01 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2740

{ GEN_MSGU_ODCR, PCIBAR0, V_Outbound_Doorbell_Clear_Register, SIZE_DW }, /* 0x02 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2741

{ GEN_MSGU_SCRATCH_PAD_0, PCIBAR0, V_Scratchpad_0_Register, SIZE_DW }, /* 0x03 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2742

{ GEN_MSGU_SCRATCH_PAD_1, PCIBAR0, V_Scratchpad_1_Register, SIZE_DW }, /* 0x04 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2743

{ GEN_MSGU_SCRATCH_PAD_2, PCIBAR0, V_Scratchpad_2_Register, SIZE_DW }, /* 0x05 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2744

{ GEN_MSGU_SCRATCH_PAD_3, PCIBAR0, V_Scratchpad_3_Register, SIZE_DW }, /* 0x06 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2745

{ GEN_MSGU_HOST_SCRATCH_PAD_0, PCIBAR0, V_Host_Scratchpad_0_Register, SIZE_DW }, /* 0x07 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2746

{ GEN_MSGU_HOST_SCRATCH_PAD_1, PCIBAR0, V_Host_Scratchpad_1_Register, SIZE_DW }, /* 0x08 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2747

{ GEN_MSGU_HOST_SCRATCH_PAD_2, PCIBAR0, V_Host_Scratchpad_2_Register, SIZE_DW }, /* 0x09 */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2748

{ GEN_MSGU_HOST_SCRATCH_PAD_3, PCIBAR0, V_Host_Scratchpad_3_Register, SIZE_DW }, /* 0x0a */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2749

{ GEN_MSGU_ODMR, PCIBAR0, V_Outbound_Doorbell_Mask_Set_Register, SIZE_DW }, /* 0x0b */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2750

{ GEN_PCIE_TRIGGER, PCIBAR0, PCIE_TRIGGER_ON_REGISTER_READ, SIZE_DW }, /* 0x0c */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2751

{ GEN_SPC_REG_RESET, PCIBAR0, V_SoftResetRegister, SIZE_DW }, /* 0x0d */