SHMEM_RD
val = SHMEM_RD(sc, validity_map[SC_PORT(sc)]);
mcp_pulse = (SHMEM_RD(sc, func_mb[mb_idx].mcp_pulse_mb) &
offset = (SHMEM_RD(sc, func_mb) +
val = SHMEM_RD(sc, dev_info.shared_feature_config.config);
SHMEM_RD(sc, dev_info.shared_hw_config.config);
SHMEM_RD(sc, dev_info.shared_hw_config.config2);
SHMEM_RD(sc, dev_info.port_feature_config[port].config);
SHMEM_RD(sc, dev_info.port_hw_config[port].speed_capability_mask);
SHMEM_RD(sc, dev_info.port_hw_config[port].speed_capability_mask2);
SHMEM_RD(sc, dev_info.port_hw_config[port].lane_config);
val = SHMEM_RD(sc, dev_info.port_feature_config[port].link_config);
SHMEM_RD(sc, dev_info.port_feature_config[port].link_config2);
val = SHMEM_RD(sc, dev_info.shared_feature_config.config);
SHMEM_RD(sc, dev_info.port_hw_config[port].multi_phy_config);
SHMEM_RD(sc, dev_info.port_hw_config[port].external_phy_config);
mac_hi = SHMEM_RD(sc, dev_info.port_hw_config[port].mac_upper);
mac_lo = SHMEM_RD(sc, dev_info.port_hw_config[port].mac_lower);
val = SHMEM_RD(sc, validity_map[SC_PORT(sc)]);
sc->devinfo.bc_ver = SHMEM_RD(sc, dev_info.bc_rev);
SHMEM_RD(sc,
SHMEM_RD(sc,
(((SHMEM_RD(sc, dev_info.port_feature_config[port].eee_power_mode)) &
(SHMEM_RD(sc, func_mb[SC_FW_MB_IDX(sc)].drv_mb_header) &
val = (SHMEM_RD(sc, dev_info.shared_hw_config.config2) &
ext_phy_config = SHMEM_RD(sc,
rc = SHMEM_RD(sc, func_mb[mb_idx].fw_mb_header);
(SHMEM_RD(sc, func_mb[SC_FW_MB_IDX(sc)].drv_mb_header) &
(SHMEM_RD(sc, func_mb[SC_FW_MB_IDX(sc)].drv_pulse_mb) &
SHMEM_RD(sc, dev_info.port_hw_config[port].external_phy_config);
val = SHMEM_RD(sc, func_mb[SC_FW_MB_IDX(sc)].drv_status);
sc->port.port_stx = SHMEM_RD(sc, port_mb[port].port_stx);
sc->func_stx = SHMEM_RD(sc, func_mb[mb_idx].fw_mb_param);
nig_timer_max = SHMEM_RD(sc, port_mb[SC_PORT(sc)].stat_nig_timer);