SDHCI_HOST_CONTROL2
case SDHCI_HOST_CONTROL2:
case SDHCI_HOST_CONTROL2:
hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2);
hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2 | SDHCI_CTRL2_EXEC_TUNING);
hostctrl2 = RD2(slot, SDHCI_HOST_CONTROL2);
WR2(slot, SDHCI_HOST_CONTROL2, hostctrl2 & ~(SDHCI_CTRL2_EXEC_TUNING |
RD2(slot, SDHCI_ACMD12_ERR), RD2(slot, SDHCI_HOST_CONTROL2));
old_timing = SDHCI_READ_2(bus, slot, SDHCI_HOST_CONTROL2);
SDHCI_WRITE_2(bus, slot, SDHCI_HOST_CONTROL2,
SDHCI_READ_2(bus, slot, SDHCI_HOST_CONTROL2) &
SDHCI_WRITE_2(bus, slot, SDHCI_HOST_CONTROL2,
SDHCI_READ_2(bus, slot, SDHCI_HOST_CONTROL2) |
case SDHCI_HOST_CONTROL2:
hostctrl2 = sdhci_xenon_read_2(brdev, slot, SDHCI_HOST_CONTROL2);
sdhci_xenon_write_2(brdev, slot, SDHCI_HOST_CONTROL2, hostctrl2);
hostctrl2 = bus_read_2(sc->mem_res, SDHCI_HOST_CONTROL2);
bus_write_2(sc->mem_res, SDHCI_HOST_CONTROL2, hostctrl2);
hostctrl2 = bus_read_2(sc->mem_res, SDHCI_HOST_CONTROL2);
bus_write_2(sc->mem_res, SDHCI_HOST_CONTROL2, hostctrl2);
hostctrl2 = bus_read_2(sc->mem_res, SDHCI_HOST_CONTROL2);