Symbol: SDHCI_CLOCK_CONTROL
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
1115
case SDHCI_CLOCK_CONTROL:
sys/arm/broadcom/bcm2835/bcm2835_sdhost.c
886
case SDHCI_CLOCK_CONTROL:
sys/arm/ti/ti_sdhci.c
187
if (off == SDHCI_CLOCK_CONTROL) {
sys/arm/ti/ti_sdhci.c
188
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
sys/arm/ti/ti_sdhci.c
286
if (off == SDHCI_CLOCK_CONTROL) {
sys/arm/ti/ti_sdhci.c
294
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
sys/arm/ti/ti_sdhci.c
299
WR4(sc, SDHCI_CLOCK_CONTROL, val32);
sys/dev/sdhci/fsl_sdhci.c
307
if (off == SDHCI_CLOCK_CONTROL) {
sys/dev/sdhci/fsl_sdhci.c
429
if (off == SDHCI_CLOCK_CONTROL) {
sys/dev/sdhci/fsl_sdhci.c
572
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/fsl_sdhci.c
592
WR4(sc, SDHCI_CLOCK_CONTROL, val32 & ~SDHC_CLK_SDCLKEN);
sys/dev/sdhci/fsl_sdhci.c
645
WR4(sc, SDHCI_CLOCK_CONTROL, val32);
sys/dev/sdhci/sdhci.c
241
RD1(slot, SDHCI_WAKE_UP_CONTROL), RD2(slot, SDHCI_CLOCK_CONTROL));
sys/dev/sdhci/sdhci.c
423
clk = RD2(slot, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/sdhci.c
424
WR2(slot, SDHCI_CLOCK_CONTROL, clk & ~SDHCI_CLOCK_CARD_EN);
sys/dev/sdhci/sdhci.c
486
WR2(slot, SDHCI_CLOCK_CONTROL, clk);
sys/dev/sdhci/sdhci.c
489
WR2(slot, SDHCI_CLOCK_CONTROL, clk);
sys/dev/sdhci/sdhci.c
492
while (!((clk = RD2(slot, SDHCI_CLOCK_CONTROL))
sys/dev/sdhci/sdhci.c
505
WR2(slot, SDHCI_CLOCK_CONTROL, clk);
sys/dev/sdhci/sdhci_fsl_fdt.c
322
val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/sdhci_fsl_fdt.c
325
WR4(sc, SDHCI_CLOCK_CONTROL, val32 & ~SDHCI_FSL_CLK_SDCLKEN);
sys/dev/sdhci/sdhci_fsl_fdt.c
372
WR4(sc, SDHCI_CLOCK_CONTROL, val32);
sys/dev/sdhci/sdhci_fsl_fdt.c
411
case SDHCI_CLOCK_CONTROL:
sys/dev/sdhci/sdhci_fsl_fdt.c
515
case SDHCI_CLOCK_CONTROL:
sys/dev/sdhci/sdhci_fsl_fdt.c
969
val = RD4(sc, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/sdhci_fsl_fdt.c
970
WR4(sc, SDHCI_CLOCK_CONTROL, val & ~SDHCI_FSL_CLK_SDCLKEN);
sys/dev/sdhci/sdhci_xenon.c
276
reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/sdhci_xenon.c
278
bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);
sys/dev/sdhci/sdhci_xenon.c
300
reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
sys/dev/sdhci/sdhci_xenon.c
302
bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);