SCI_MAX_PHYS
for (phy = 0; phy < SCI_MAX_PHYS; phy++) {
struct ISCI_PHY phys[SCI_MAX_PHYS];
for (i = 0; i < SCI_MAX_PHYS; i++)
for (i = 0; i < SCI_MAX_PHYS; i++) {
controller_index = phy_to_be_stopped / SCI_MAX_PHYS;
phy_index = phy_to_be_stopped % SCI_MAX_PHYS;
controller_index = phy_to_be_started / SCI_MAX_PHYS;
phy_index = phy_to_be_started % SCI_MAX_PHYS;
#ifndef SCI_MAX_PHYS
#define SCI_MAX_PORTS SCI_MAX_PHYS
} phys[SCI_MAX_PHYS];
for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++)
for (index = 0; index < SCI_MAX_PHYS; index++)
if (this_controller->next_phy_to_start == SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
(i < SCI_MAX_PHYS)
for (j = 0; j < SCI_MAX_PHYS; j++)
for(i = 0; i < SCI_MAX_PHYS; i++)
if (i == SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
for(index = 0; index < SCI_MAX_PHYS; index++)
+ ((SCI_MAX_PHYS-1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL));
for (index = 0; index < SCI_MAX_PHYS; index++)
for(index=0; index<SCI_MAX_PHYS; index++)
for(index=0; index<SCI_MAX_PHYS; index++)
for(index=0; index<SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index ++)
*count = SCI_MAX_PHYS;
(result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
for (index = 0; index < SCI_MAX_PHYS; index++)
for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++)
for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++)
SCIC_SDS_PHY_T *requesters[SCI_MAX_PHYS];
struct SCIC_SDS_PHY phy_table[SCI_MAX_PHYS];
#define SCIC_SDS_PHY_MIN_TIMER_COUNT (SCI_MAX_PHYS)
#define SCIC_SDS_PHY_MAX_TIMER_COUNT (SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
U32 existing_phy_index = SCI_MAX_PHYS;
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
(existing_phy_index < SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
(phy_index < SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
for (index = 0; index < SCI_MAX_PHYS; index++)
struct SCIC_SDS_PHY *phy_table[SCI_MAX_PHYS];
for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++)
while (phy_index < SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
while (phy_index < SCI_MAX_PHYS)
while (++phy_index < SCI_MAX_PHYS)
for (index = 0; index < SCI_MAX_PHYS; index++)
(controller->next_phy_to_start == SCI_MAX_PHYS) &&
struct SCIC_SDS_PORT_RANGE phy_valid_port_range[SCI_MAX_PHYS];
for(i = 0; i < SCI_MAX_PHYS; i++)
for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++)
#ifndef SCI_MAX_PHYS
} phys[SCI_MAX_PHYS]; // 4 PHYs per SCU controller unit
} phys[SCI_MAX_PHYS]; // 4 PHYs per SCU controller unit
} phys[SCI_MAX_PHYS]; // 4 PHYs per SCU controller unit
} phys[SCI_MAX_PHYS]; // 4 PHYs per SCU controller unit