RX_DESC_COUNT
struct awg_bufmap buf_map[RX_DESC_COUNT];
#define RX_DESC_SIZE (sizeof(struct emac_desc) * RX_DESC_COUNT)
#define RX_NEXT(n) (((n) + 1) & (RX_DESC_COUNT - 1))
for (i = 0; i < RX_DESC_COUNT; i++) {
index = q->cons_idx & (RX_DESC_COUNT - 1);
struct gen_ring_ent rx_ring_ent[RX_DESC_COUNT]; /* ring entries */
for (i = 0; i < RX_DESC_COUNT; i++) {
for (i = 0; i < RX_DESC_COUNT; i++) {
RX_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
(5 << GENET_RX_DMA_XON_XOFF_THRES_LO_SHIFT) | (RX_DESC_COUNT >> 4));
for (i = 0; i < RX_DESC_COUNT; i++)
RX_DESC_COUNT);
for (i = 0; i < RX_DESC_COUNT; i++) {
return ((curidx + 1) % RX_DESC_COUNT);
for (idx = 0; idx < RX_DESC_COUNT; idx++) {
for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
struct dwc_bufmap rxbuf_map[RX_DESC_COUNT];
#define RX_DESC_SIZE (sizeof(struct dwc_hwdesc) * RX_DESC_COUNT)
for (i = 0; i < RX_DESC_COUNT; i++) {
for (i = 0; i < RX_DESC_COUNT; i++) {
WR4(sc, GMAC_DMA_CHAN0_RX_RING_LEN, RX_DESC_COUNT - 1);
(uint32_t)sc->rx.desc_ring_paddr + DESC_OFFSET(RX_DESC_COUNT));
#define RX_DESC_SIZE (RX_DESC_COUNT * DESC_ALIGN)
#define RX_NEXT(n) (((n) + 1) % RX_DESC_COUNT)
for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
#define RX_DESC_SIZE (sizeof(struct ffec_hwdesc) * RX_DESC_COUNT)
for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
struct ffec_bufmap rxbuf_map[RX_DESC_COUNT];
return ((curidx == RX_DESC_COUNT - 1) ? 0 : curidx + 1);
for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
(RX_DESC_COUNT - 1) * sizeof(struct axidma_desc);
return ((curidx == RX_DESC_COUNT - 1) ? 0 : curidx + 1);
#define RX_DESC_SIZE (sizeof(struct axidma_desc) * RX_DESC_COUNT)
struct xae_bufmap rxbuf_map[RX_DESC_COUNT];