sys/dev/clk/rockchip/rk_clk_pll.c

147

RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

229

RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

235

RK3066_CLK_PLL_RESET << RK_CLK_PLL_MASK_SHIFT);

sys/dev/clk/rockchip/rk_clk_pll.c

265

RK3066_CLK_PLL_RESET << RK_CLK_PLL_MASK_SHIFT);

sys/dev/clk/rockchip/rk_clk_pll.c

288

RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

452

RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

469

RK3328_CLK_PLL_REFDIV_MASK) << RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

491

RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

693

reg |= RK3399_CLK_PLL_MODE_MASK << RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

698

reg |= RK3399_CLK_PLL_FBDIV_MASK << RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

706

RK3399_CLK_PLL_REFDIV_MASK) << RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

717

reg |= RK3399_CLK_PLL_DSMPD_MASK << RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

730

reg |= RK3399_CLK_PLL_MODE_MASK << RK_CLK_PLL_MASK_SHIFT;

sys/dev/clk/rockchip/rk_clk_pll.c

86

val |= (1 << sc->gate_shift) << RK_CLK_PLL_MASK_SHIFT;