REG_WRITE1
REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, VGA_GEN_MO_VSP | VGA_GEN_MO_HSP |
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CLOCKING_MODE);
REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_CM_89);
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MEMORY_MODE);
REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_OE | VGA_SEQ_MM_EM);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MISCELLANEOUS);
REG_WRITE1(sc, VGA_GC_DATA, 0x04 + VGA_GC_MISC_GA);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_TOTAL);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x5f); /* 760 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_HORIZ_DISP_END);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x4f); /* 640 - 8 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_BLANK);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x50); /* 640 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_BLANK);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHB_CR + 2);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_HORIZ_RETRACE);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x54); /* 672 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_HORIZ_RETRACE);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_EHR_EHB + 0);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_TOTAL);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x0b); /* 523 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OVERFLOW);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_OF_VT9 | VGA_CRTC_OF_LC8 |
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MAX_SCAN_LINE);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MSL_LC9);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_START);
REG_WRITE1(sc, VGA_CRTC_DATA, 0xea); /* 480 + 10 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x0c);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_DISPLAY_END);
REG_WRITE1(sc, VGA_CRTC_DATA, 0xdf); /* 480 - 1*/
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_OFFSET);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x28);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_VERT_BLANK);
REG_WRITE1(sc, VGA_CRTC_DATA, 0xe7); /* 480 + 7 */
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_END_VERT_BLANK);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x04);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_MC_WB | VGA_CRTC_MC_AW |
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_LINE_COMPARE);
REG_WRITE1(sc, VGA_CRTC_DATA, 0xff); /* 480 + 31 */
REG_WRITE1(sc, VGA_GEN_FEATURE_CTRL_W, 0);
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 |
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_CHAR_MAP_SELECT);
REG_WRITE1(sc, VGA_SEQ_DATA, 0);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
REG_WRITE1(sc, VGA_GC_DATA, 0);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET);
REG_WRITE1(sc, VGA_GC_DATA, 0x0f);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_COMPARE);
REG_WRITE1(sc, VGA_GC_DATA, 0);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_DATA_ROTATE);
REG_WRITE1(sc, VGA_GC_DATA, 0);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_READ_MAP_SELECT);
REG_WRITE1(sc, VGA_GC_DATA, 0);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
REG_WRITE1(sc, VGA_GC_DATA, 0);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_COLOR_DONT_CARE);
REG_WRITE1(sc, VGA_GC_DATA, 0x0f);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_BIT_MASK);
REG_WRITE1(sc, VGA_GC_DATA, 0xff);
REG_WRITE1(sc, VGA_GEN_MISC_OUTPUT_W, x | VGA_GEN_MO_IOA);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_VERT_RETRACE_END);
REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_VRE_PR);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
REG_WRITE1(sc, VGA_CRTC_DATA, x & ~VGA_CRTC_MC_HR);
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_PRESET_ROW_SCAN);
REG_WRITE1(sc, VGA_CRTC_DATA, 0);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_START);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_CS_COO);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_END);
REG_WRITE1(sc, VGA_CRTC_DATA, 0);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_HIGH);
REG_WRITE1(sc, VGA_CRTC_DATA, 0);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_START_ADDR_LOW);
REG_WRITE1(sc, VGA_CRTC_DATA, 0);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_HIGH);
REG_WRITE1(sc, VGA_CRTC_DATA, 0);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_CURSOR_LOC_LOW);
REG_WRITE1(sc, VGA_CRTC_DATA, 0x59);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_UNDERLINE_LOC);
REG_WRITE1(sc, VGA_CRTC_DATA, VGA_CRTC_UL_UL);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL);
REG_WRITE1(sc, VGA_AC_WRITE, 0);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MODE_CONTROL);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_MC_GA);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_HORIZ_PIXEL_PANNING);
REG_WRITE1(sc, VGA_AC_WRITE, 0);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(0));
REG_WRITE1(sc, VGA_AC_WRITE, 0);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(1));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_B);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(2));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(3));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_G | VGA_AC_PAL_B);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(4));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(5));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_B);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(6));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SG | VGA_AC_PAL_R);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(7));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_R | VGA_AC_PAL_G | VGA_AC_PAL_B);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(8));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(9));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(10));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(11));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(12));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(13));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(14));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PALETTE(15));
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_PAL_SR | VGA_AC_PAL_SG |
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_OVERSCAN_COLOR);
REG_WRITE1(sc, VGA_AC_WRITE, 0);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_PLANE_ENABLE);
REG_WRITE1(sc, VGA_AC_WRITE, 0x0f);
REG_WRITE1(sc, VGA_AC_WRITE, VGA_AC_COLOR_SELECT);
REG_WRITE1(sc, VGA_AC_WRITE, 0);
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_RESET);
REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_RST_SR | VGA_SEQ_RST_NAR);
REG_WRITE1(sc, VGA_CRTC_ADDRESS, VGA_CRTC_MODE_CONTROL);
REG_WRITE1(sc, VGA_CRTC_DATA, x | VGA_CRTC_MC_HR);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
REG_WRITE1(sc, VGA_GC_DATA, 3);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_ENABLE_SET_RESET);
REG_WRITE1(sc, VGA_GC_DATA, 0x00);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_MODE);
REG_WRITE1(sc, VGA_GC_DATA, wmode);
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
REG_WRITE1(sc, VGA_SEQ_DATA, VGA_SEQ_MM_EM3 | VGA_SEQ_MM_EM2 |
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]);
REG_WRITE1(sc, VGA_GC_ADDRESS, VGA_GC_SET_RESET);
REG_WRITE1(sc, VGA_GC_DATA, cons_to_vga_colors[color]);
REG_WRITE1(sc, VGA_SEQ_ADDRESS, VGA_SEQ_MAP_MASK);
REG_WRITE1(sc, VGA_SEQ_DATA, 1 << plane);