sys/dev/qlxgb/qla_ioctl.c

101

rv->val = READ_OFFSET32(ha, rv->reg);

sys/dev/qlxgb/qla_misc.c

233

while (offset != (READ_OFFSET32(ha, Q8_CRB_WINDOW_2M))) {

sys/dev/qlxgb/qla_misc.c

244

*val = READ_OFFSET32(ha, ((addr & 0xFFFF) | 0x1E0000));

sys/dev/qlxgb/qla_misc.c

278

data = READ_OFFSET32(ha, Q8_MIU_TEST_AGT_CTRL);

sys/dev/qlxgb/qla_misc.c

281

val->data_lo = READ_OFFSET32(ha, \

sys/dev/qlxgb/qla_misc.c

283

val->data_hi = READ_OFFSET32(ha, \

sys/dev/qlxgb/qla_misc.c

285

val->data_ulo = READ_OFFSET32(ha, \

sys/dev/qlxgb/qla_misc.c

287

val->data_uhi = READ_OFFSET32(ha, \

sys/dev/qlxgb/qla_misc.c

327

while (!((val = READ_OFFSET32(ha, Q8_ROM_STATUS)) & BIT_1)) {

sys/dev/qlxgb/qla_misc.c

560

data = READ_OFFSET32(ha, Q8_CMDPEG_STATE);

sys/dev/qlxgb/qla_misc.c

578

(READ_OFFSET32(ha, Q8_PEG_HALT_STATUS1)),

sys/dev/qlxgb/qla_misc.c

579

(READ_OFFSET32(ha, Q8_PEG_HALT_STATUS2)),

sys/dev/qlxgb/qla_misc.c

580

(READ_OFFSET32(ha, Q8_FIRMWARE_HEARTBEAT)),

sys/dev/qlxgb/qla_misc.c

581

(READ_OFFSET32(ha, Q8_RCVPEG_STATE)), data);

sys/dev/qlxgb/qla_misc.c

605

val = READ_OFFSET32(ha, Q8_CMDPEG_STATE);

sys/dev/qlxgb/qla_misc.c

619

val = READ_OFFSET32(ha, Q8_CMDPEG_STATE);

sys/dev/qlxgb/qla_misc.c

625

ha->fw_ver_major = READ_OFFSET32(ha, Q8_FW_VER_MAJOR);

sys/dev/qlxgb/qla_misc.c

626

ha->fw_ver_minor = READ_OFFSET32(ha, Q8_FW_VER_MINOR);

sys/dev/qlxgb/qla_misc.c

627

ha->fw_ver_sub = READ_OFFSET32(ha, Q8_FW_VER_SUB);

sys/dev/qlxgb/qla_misc.c

640

ha->fw_ver_major = READ_OFFSET32(ha, Q8_FW_VER_MAJOR);

sys/dev/qlxgb/qla_misc.c

641

ha->fw_ver_minor = READ_OFFSET32(ha, Q8_FW_VER_MINOR);

sys/dev/qlxgb/qla_misc.c

642

ha->fw_ver_sub = READ_OFFSET32(ha, Q8_FW_VER_SUB);

sys/dev/qlxgb/qla_misc.c

643

ha->fw_ver_build = READ_OFFSET32(ha, Q8_FW_VER_BUILD);

sys/dev/qlxgb/qla_misc.c

657

val = READ_OFFSET32(ha, Q8_ROM_STATUS);