sys/arm/freescale/vybrid/vf_spi.c

241

in_buf[i] = READ1(sc, SPI_POPR);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

175

div_reg = READ1(sc, I2C_IBFD);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

240

if ((READ1(sc, I2C_IBSR) & IBSR_IBB) == 0)

sys/dev/iicbus/controller/vybrid/vf_i2c.c

259

ibsr = READ1(sc, I2C_IBSR);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

283

return (READ1(sc, I2C_IBSR) & IBSR_RXAK) ? false : true;

sys/dev/iicbus/controller/vybrid/vf_i2c.c

300

if ((READ1(sc, I2C_IBSR) & IBSR_IBB) == 0) {

sys/dev/iicbus/controller/vybrid/vf_i2c.c

306

reg = READ1(sc, I2C_IBCR);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

394

if ((READ1(sc, I2C_IBCR) & IBCR_MSSL) != 0)

sys/dev/iicbus/controller/vybrid/vf_i2c.c

485

READ1(sc, I2C_IBDR);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

505

*buf++ = READ1(sc, I2C_IBDR);