sys/arm/arm/autoconf.c

93

enable_interrupts(PSR_I);

sys/arm/arm/exec_machdep.c

225

(spsr & (PSR_I | PSR_F)) != 0)

sys/arm/arm/machdep.c

316

cspr = disable_interrupts(PSR_I);

sys/arm/arm/pmap-v6.c

3401

cspr = disable_interrupts(PSR_I);

sys/arm/arm/pmap-v6.c

3426

cspr = disable_interrupts(PSR_I);

sys/arm/arm/syscall.c

161

if (__predict_true(frame->tf_spsr & PSR_I) == 0)

sys/arm/arm/syscall.c

162

enable_interrupts(PSR_I);

sys/arm/arm/trap-v6.c

405

if (__predict_true(tf->tf_spsr & PSR_I) == 0)

sys/arm/arm/trap-v6.c

406

enable_interrupts(PSR_I);

sys/arm/arm/trap-v6.c

562

disable_interrupts(PSR_I);

sys/arm/arm/undefined.c

227

if (__predict_true(frame->tf_spsr & PSR_I) == 0)

sys/arm/arm/undefined.c

228

enable_interrupts(PSR_I);

sys/arm/include/cpufunc.h

105

#define __ARM_INTR_BITS (PSR_I | PSR_F | PSR_A)

sys/arm/include/cpufunc.h

148

return (disable_interrupts(PSR_I | PSR_F));

sys/arm64/arm64/debug_monitor.c

223

kdb_frame->tf_spsr |= (PSR_A | PSR_I | PSR_F);

sys/arm64/include/armreg.h

2847

#define PSR_DAIF (PSR_D | PSR_A | PSR_I | PSR_F)

sys/arm64/include/armreg.h

2850

#define PSR_DAIF_INTR (PSR_I | PSR_F)

sys/arm64/vmm/vmm_arm64.c

1445

hypctx->debug_spsr |= (host_spsr_el2 & (PSR_I | PSR_F));

sys/arm64/vmm/vmm_arm64.c

1446

host_spsr_el2 |= PSR_I | PSR_F;

sys/arm64/vmm/vmm_arm64.c

1448

host_spsr_el2 &= ~(PSR_I | PSR_F);

sys/arm64/vmm/vmm_arm64.c

1449

host_spsr_el2 |= (hypctx->debug_spsr & (PSR_I | PSR_F));

sys/arm64/vmm/vmm_arm64.c

1450

hypctx->debug_spsr &= ~(PSR_I | PSR_F);

sys/arm64/vmm/vmm_reset.c

153

hypctx_write_sys_reg(el2ctx, HOST_SPSR_EL2, PSR_D | PSR_A | PSR_I | PSR_F);

sys/cddl/dev/kinst/aarch64/kinst_isa.c

223

if ((ks->status & PSR_I) == 0)

sys/cddl/dev/kinst/aarch64/kinst_isa.c

224

frame->tf_spsr &= ~PSR_I;

sys/cddl/dev/kinst/aarch64/kinst_isa.c

252

frame->tf_spsr |= PSR_I;