sys/arm/ti/ti_adc.c

112

ADC_WRITE4(sc, ADC_IRQENABLE_SET,

sys/arm/ti/ti_adc.c

134

ADC_WRITE4(sc, ADC_CTRL, reg);

sys/arm/ti/ti_adc.c

150

ADC_WRITE4(sc, ADC_STEPENABLE, 0);

sys/arm/ti/ti_adc.c

153

ADC_WRITE4(sc, ADC_CTRL, ADC_READ4(sc, ADC_CTRL) & ~ADC_CTRL_ENABLE);

sys/arm/ti/ti_adc.c

156

ADC_WRITE4(sc, ADC_IRQENABLE_CLR,

sys/arm/ti/ti_adc.c

160

ADC_WRITE4(sc, ADC_IRQSTATUS, ADC_READ4(sc, ADC_IRQSTATUS));

sys/arm/ti/ti_adc.c

199

ADC_WRITE4(sc, ADC_STEPENABLE, enabled);

sys/arm/ti/ti_adc.c

238

ADC_WRITE4(sc, reg, val);

sys/arm/ti/ti_adc.c

286

ADC_WRITE4(sc, ADC_CLKDIV, reg);

sys/arm/ti/ti_adc.c

349

ADC_WRITE4(sc, input->stepdelay, reg & ADC_STEP_OPEN_DELAY);

sys/arm/ti/ti_adc.c

513

ADC_WRITE4(sc, ADC_IRQENABLE_CLR,

sys/arm/ti/ti_adc.c

536

ADC_WRITE4(sc, ADC_IRQSTATUS, status);

sys/arm/ti/ti_adc.c

636

ADC_WRITE4(sc, ADC_STEPCFG(i), stepconfig);

sys/arm/ti/ti_adc.c

637

ADC_WRITE4(sc, ADC_STEPDLY(i), STEPDLY_OPEN);

sys/arm/ti/ti_adc.c

655

ADC_WRITE4(sc, ADC_STEPCFG(i), stepconfig);

sys/arm/ti/ti_adc.c

656

ADC_WRITE4(sc, ADC_STEPDLY(i), STEPDLY_OPEN);

sys/arm/ti/ti_adc.c

661

ADC_WRITE4(sc, ADC_TC_CHARGE_STEPCONFIG, val);

sys/arm/ti/ti_adc.c

662

ADC_WRITE4(sc, ADC_TC_CHARGE_DELAY, sc->sc_charge_delay);

sys/arm/ti/ti_adc.c

670

ADC_WRITE4(sc, ADC_STEPCFG(start_step), stepconfig);

sys/arm/ti/ti_adc.c

671

ADC_WRITE4(sc, ADC_STEPDLY(start_step), STEPDLY_OPEN);

sys/arm/ti/ti_adc.c

674

ADC_WRITE4(sc, ADC_STEPCFG(start_step), stepconfig);

sys/arm/ti/ti_adc.c

675

ADC_WRITE4(sc, ADC_STEPDLY(start_step), STEPDLY_OPEN);

sys/arm/ti/ti_adc.c

677

ADC_WRITE4(sc, ADC_FIFO1THRESHOLD, (sc->sc_coord_readouts*2 + 2) - 1);

sys/arm/ti/ti_adc.c

696

ADC_WRITE4(sc, ADC_IDLECONFIG, val);

sys/arm/ti/ti_adc.c

856

ADC_WRITE4(sc, ADC_CTRL, reg | ADC_CTRL_STEP_WP | ADC_CTRL_STEP_ID);

sys/arm/ti/ti_adc.c

864

ADC_WRITE4(sc, ADC_CLKDIV, 24 - 1);

sys/arm/ti/ti_adc.c

866

ADC_WRITE4(sc, ADC_CLKDIV, 2400 - 1);