sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1013

PMU_DEBUG(sc, "Changing rsrc %d res_updn_timer to %#x\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1036

PMU_DEBUG(sc, "Applying %s=%d to rsrc %d res_updn_timer\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1066

PMU_DEBUG(sc, "Changing rsrc %hhu res_dep_mask to "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1072

PMU_DEBUG(sc, "Adding %#x to rsrc %hhu "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1079

PMU_DEBUG(sc, "Removing %#x from rsrc %hhu "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1112

PMU_DEBUG(sc, "Applying %s=%d to rsrc %d res_dep_mask\n", name,

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1127

PMU_DEBUG(sc, "Changing max_res_mask to 0x%x\n", max_mask);

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1134

PMU_DEBUG(sc, "Changing min_res_mask to 0x%x\n", min_mask);

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1387

PMU_DEBUG(sc, "bhnd_pmu1_xtaltab0: Unknown chipid %#hx\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1420

PMU_DEBUG(sc, "bhnd_pmu1_xtaldef0: Unknown chipid %#hx\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1443

PMU_DEBUG(sc, "bhnd_pmu1_pllfvco0: Unknown chipid %#hx\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1489

PMU_DEBUG(sc, "Unspecified xtal frequency, skipping PLL "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1503

PMU_DEBUG(sc, "XTAL %d.%d MHz (%d)\n", xtal / 1000, xtal % 1000,

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1518

PMU_DEBUG(sc, "PLL already programmed for %d.%d MHz\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1524

PMU_DEBUG(sc,

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1530

PMU_DEBUG(sc, "Programming PLL for %d.%d MHz\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1551

PMU_DEBUG(sc, "Done masking\n");

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1584

PMU_DEBUG(sc, "Done pll\n");

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1656

PMU_DEBUG(sc, "bhnd_pmu0_cpuclk0: wbint %u wbfrac %u fvco %u\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1683

PMU_DEBUG(sc, "Unspecified xtal frequency, skipping PLL "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1712

PMU_DEBUG(sc, "PLL already programmed for %d.%dMHz\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1717

PMU_DEBUG(sc, "XTAL %d.%dMHz (%d)\n", xtal / 1000, xtal % 1000, xt->xf);

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1718

PMU_DEBUG(sc, "Programming PLL for %d.%dMHz\n", xt->fref / 1000,

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1842

PMU_DEBUG(sc, "Done masking\n");

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1916

PMU_DEBUG(sc, "Adjusting PLL buffer drive strength: %x\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

1946

PMU_DEBUG(sc, "Done pll\n");

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2032

PMU_DEBUG(sc, "bhnd_pmu1_cpuclk0: ndiv_int %u ndiv_frac %u p2div %u "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2134

PMU_DEBUG("No PLL init done for chip %#hx rev %d pmurev %d\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2205

PMU_DEBUG("No ALP clock specified "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2277

PMU_DEBUG(sc, "%s: p1=%d, p2=%d, ndiv=%d(0x%x), m%d=%d; fc=%d, "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2653

PMU_DEBUG(sc, "SDIO: %dmA drive strength selected, set to "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2748

PMU_DEBUG(sc, "bhnd_pmu_res_uptime: rsrc %hhu uptime %u(deps 0x%08x "

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2834

PMU_DEBUG(sc, "Adding rsrc 0x%x to min_res_mask\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2853

PMU_DEBUG(sc, "Removing rsrc 0x%x from min_res_mask\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

2907

PMU_DEBUG("RCal completed, status 0x%x, code 0x%x\n",

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

886

PMU_DEBUG(sc, "Applying rmin=%#x to min_mask\n", nval);

sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c

897

PMU_DEBUG(sc, "Applying rmax=%#x to max_mask\n", nval);