PMURES_BIT
pll_res = PMURES_BIT(RES4328_BB_PLL_PU);
pll_res = PMURES_BIT(RES5354_BB_PLL_PU);
~(PMURES_BIT(RES4325_BBPLL_PWRSW_PU) |
PMURES_BIT(RES4325_HT_AVAIL)));
~(PMURES_BIT(RES4325_BBPLL_PWRSW_PU) |
PMURES_BIT(RES4325_HT_AVAIL)));
~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) |
PMURES_BIT(RES4329_HT_AVAIL)));
~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) |
PMURES_BIT(RES4329_HT_AVAIL)));
~(PMURES_BIT(RES4319_HT_AVAIL)));
~(PMURES_BIT(RES4319_HT_AVAIL)));
~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU)));
~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU)));
~(PMURES_BIT(RES4336_HT_AVAIL) |
PMURES_BIT(RES4336_MACPHY_CLKAVAIL)));
~(PMURES_BIT(RES4336_HT_AVAIL) |
PMURES_BIT(RES4336_MACPHY_CLKAVAIL)));
~(PMURES_BIT(RES4330_HT_AVAIL) |
PMURES_BIT(RES4330_MACPHY_CLKAVAIL)));
~(PMURES_BIT(RES4330_HT_AVAIL) |
PMURES_BIT(RES4330_MACPHY_CLKAVAIL)));
res_ht = PMURES_BIT(RES4322_HT_SI_AVAIL);
res_pll = PMURES_BIT(RES4322_SI_PLL_ON);
rsrcs = PMURES_BIT(RES4322_OTP_PU);
rsrcs = PMURES_BIT(RES4315_OTP_PU);
rsrcs = PMURES_BIT(RES4325_OTP_PU);
rsrcs = PMURES_BIT(RES4329_OTP_PU);
rsrcs = PMURES_BIT(RES4319_OTP_PU);
rsrcs = PMURES_BIT(RES4336_OTP_PU);
rsrcs = PMURES_BIT(RES4330_OTP_PU);
otp_res = PMURES_BIT(RES4329_OTP_PU);
otp_res = PMURES_BIT(RES4319_OTP_PU);
otp_res = PMURES_BIT(RES4336_OTP_PU);
otp_res = PMURES_BIT(RES4330_OTP_PU);
ldo = PMURES_BIT(RES4328_PA_REF_LDO);
ldo = PMURES_BIT(RES5354_PA_REF_LDO);
ldo = PMURES_BIT(RES4312_PA_REF_LDO);
rsrcs = PMURES_BIT(RES4325_BUCK_BOOST_BURST);
PMURES_BIT(RES4328_ILP_REQUEST),
PMURES_BIT(RES4328_EXT_SWITCHER_PWM) |
PMURES_BIT(RES4328_BB_SWITCHER_PWM), NULL}
PMURES_BIT(RES4325_OTP_PU),
PMURES_BIT(RES4325_BUCK_BOOST_BURST), NULL},
PMURES_BIT(RES4325_ALP_AVAIL) | PMURES_BIT(RES4325_HT_AVAIL),
PMURES_BIT(RES4325_BUCK_BOOST_BURST) |
PMURES_BIT(RES4325_BUCK_BOOST_PWM), bhnd_pmu_res_depfltr_bb},
PMURES_BIT(RES4325_HT_AVAIL),
PMURES_BIT(RES4325_RX_PWRSW_PU) |
PMURES_BIT(RES4325_TX_PWRSW_PU) |
PMURES_BIT(RES4325_LOGEN_PWRSW_PU) |
PMURES_BIT(RES4325_AFE_PWRSW_PU), NULL},
PMURES_BIT(RES4325_ILP_REQUEST) |
PMURES_BIT(RES4325_ABUCK_BURST) |
PMURES_BIT(RES4325_ABUCK_PWM) |
PMURES_BIT(RES4325_LNLDO1_PU) |
PMURES_BIT(RES4325C1_LNLDO2_PU) |
PMURES_BIT(RES4325_XTAL_PU) |
PMURES_BIT(RES4325_ALP_AVAIL) |
PMURES_BIT(RES4325_RX_PWRSW_PU) |
PMURES_BIT(RES4325_TX_PWRSW_PU) |
PMURES_BIT(RES4325_RFPLL_PWRSW_PU) |
PMURES_BIT(RES4325_LOGEN_PWRSW_PU) |
PMURES_BIT(RES4325_AFE_PWRSW_PU) |
PMURES_BIT(RES4325_BBPLL_PWRSW_PU) |
PMURES_BIT(RES4325_HT_AVAIL), RES_DEPEND_REMOVE,
PMURES_BIT(RES4325B0_CBUCK_LPOM) |
PMURES_BIT(RES4325B0_CBUCK_BURST) |
PMURES_BIT(RES4325B0_CBUCK_PWM), bhnd_pmu_res_depfltr_ncb}
PMURES_BIT(RES4315_OTP_PU),
PMURES_BIT(RES4315_PALDO_PU), bhnd_pmu_res_depfltr_npaldo},
PMURES_BIT(RES4315_ALP_AVAIL) | PMURES_BIT(RES4315_HT_AVAIL),
PMURES_BIT(RES4315_PALDO_PU), bhnd_pmu_res_depfltr_paldo},
PMURES_BIT(RES4315_HT_AVAIL),
PMURES_BIT(RES4315_RX_PWRSW_PU) |
PMURES_BIT(RES4315_TX_PWRSW_PU) |
PMURES_BIT(RES4315_LOGEN_PWRSW_PU) |
PMURES_BIT(RES4315_AFE_PWRSW_PU), NULL},
PMURES_BIT(RES4315_CLDO_PU) | PMURES_BIT(RES4315_ILP_REQUEST) |
PMURES_BIT(RES4315_LNLDO1_PU) |
PMURES_BIT(RES4315_OTP_PU) |
PMURES_BIT(RES4315_LNLDO2_PU) |
PMURES_BIT(RES4315_XTAL_PU) |
PMURES_BIT(RES4315_ALP_AVAIL) |
PMURES_BIT(RES4315_RX_PWRSW_PU) |
PMURES_BIT(RES4315_TX_PWRSW_PU) |
PMURES_BIT(RES4315_RFPLL_PWRSW_PU) |
PMURES_BIT(RES4315_LOGEN_PWRSW_PU) |
PMURES_BIT(RES4315_AFE_PWRSW_PU) |
PMURES_BIT(RES4315_BBPLL_PWRSW_PU) |
PMURES_BIT(RES4315_HT_AVAIL), RES_DEPEND_REMOVE,
PMURES_BIT(RES4315_CBUCK_LPOM) |
PMURES_BIT(RES4315_CBUCK_BURST) |
PMURES_BIT(RES4315_CBUCK_PWM), bhnd_pmu_res_depfltr_ncb}
PMURES_BIT(RES4329_HT_AVAIL),
PMURES_BIT(RES4329_CBUCK_LPOM) |
PMURES_BIT(RES4329_CBUCK_BURST) |
PMURES_BIT(RES4329_CBUCK_PWM) |
PMURES_BIT(RES4329_CLDO_PU) |
PMURES_BIT(RES4329_PALDO_PU) |
PMURES_BIT(RES4329_LNLDO1_PU) |
PMURES_BIT(RES4329_XTAL_PU) |
PMURES_BIT(RES4329_ALP_AVAIL) |
PMURES_BIT(RES4329_RX_PWRSW_PU) |
PMURES_BIT(RES4329_TX_PWRSW_PU) |
PMURES_BIT(RES4329_RFPLL_PWRSW_PU) |
PMURES_BIT(RES4329_LOGEN_PWRSW_PU) |
PMURES_BIT(RES4329_AFE_PWRSW_PU) |
PMURES_BIT(RES4329_BBPLL_PWRSW_PU), NULL}
PMURES_BIT(RES4319_OTP_PU),
PMURES_BIT(RES4319_PALDO_PU), bhnd_pmu_res_depfltr_npaldo},
PMURES_BIT(RES4319_HT_AVAIL),
PMURES_BIT(RES4319_PALDO_PU), bhnd_pmu_res_depfltr_paldo},
PMURES_BIT(RES4319_HT_AVAIL),
PMURES_BIT(RES4319_RX_PWRSW_PU) |
PMURES_BIT(RES4319_TX_PWRSW_PU) |
PMURES_BIT(RES4319_RFPLL_PWRSW_PU) |
PMURES_BIT(RES4319_LOGEN_PWRSW_PU) |
PMURES_BIT(RES4319_AFE_PWRSW_PU), NULL}
PMURES_BIT(RES4336_RSVD), RES_DEPEND_ADD, 0, NULL}
PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL}
min_mask |= PMURES_BIT(RES4325B0_CBUCK_LPOM);
min_mask |= PMURES_BIT(RES4325B0_CLDO_PU);
min_mask |= PMURES_BIT(RES4325_OTP_PU);
min_mask |= PMURES_BIT(
min_mask = PMURES_BIT(RES4322_RF_LDO) |
PMURES_BIT(RES4322_XTAL_PU) |
PMURES_BIT(RES4322_ALP_AVAIL);
PMURES_BIT(RES4322_SI_PLL_ON) |
PMURES_BIT(RES4322_HT_SI_AVAIL) |
PMURES_BIT(RES4322_PHY_PLL_ON) |
PMURES_BIT(RES4322_OTP_PU) |
PMURES_BIT(RES4322_HT_PHY_AVAIL);
PMURES_BIT(RES4328_BB_SWITCHER_PWM) |
PMURES_BIT(RES4328_EXT_SWITCHER_PWM) |
PMURES_BIT(RES4328_XTAL_EN);
PMURES_BIT(RES4329_CBUCK_LPOM) |
PMURES_BIT(RES4329_LNLDO1_PU) |
PMURES_BIT(RES4329_CLDO_PU);
PMURES_BIT(RES4329_CBUCK_LPOM) |
PMURES_BIT(RES4329_CLDO_PU);
min_mask |= PMURES_BIT(RES4329_OTP_PU);
min_mask = PMURES_BIT(RES4319_CBUCK_LPOM) |
PMURES_BIT(RES4319_CLDO_PU);
PMURES_BIT(RES4336_CBUCK_LPOM) |
PMURES_BIT(RES4336_CLDO_PU) |
PMURES_BIT(RES4336_LDO3P3_PU) |
PMURES_BIT(RES4336_OTP_PU) |
PMURES_BIT(RES4336_DIS_INT_RESET_PD);
PMURES_BIT(RES4330_CBUCK_LPOM) | PMURES_BIT(RES4330_CLDO_PU)
| PMURES_BIT(RES4330_DIS_INT_RESET_PD) |
PMURES_BIT(RES4330_LDO3P3_PU) | PMURES_BIT(RES4330_OTP_PU);
min_mask = PMURES_BIT(RES4313_BB_PU_RSRC) |
PMURES_BIT(RES4313_XTAL_PU_RSRC) |
PMURES_BIT(RES4313_ALP_AVAIL_RSRC) |
PMURES_BIT(RES4313_BB_PLL_PWRSW_RSRC);