Symbol: PLLP_BASE
sys/arm/nvidia/tegra124/tegra124_clk_pll.c
292
.base_reg = PLLP_BASE,
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
361
.base_reg = PLLP_BASE,
sys/arm64/nvidia/tegra210/tegra210_clk_pll.c
546
DIV_TB(0, "pllP_out2", "pllP_out0", PLLP_BASE, 20, 5, tegra210_pll_pdiv_tbl),