PLLC_OUT
GATE_PLL(0, "pllC_out1", "pllC_out1_div", PLLC_OUT, 0),
DIV7_1(0, "pllC_out1_div", "pllC_out0", PLLC_OUT, 2),
GATE_PLL(0, "pllC_out1", "pllC_out1_div", PLLC_OUT, 0),
DIV7_1(0, "pllC_out1_div", "pllC_out0", PLLC_OUT, 8),