Symbol: PLL4_CTRL_DIV_SEL_S
sys/arm/freescale/vybrid/vf_anadig.c
166
reg &= ~(PLL4_CTRL_DIV_SEL_M << PLL4_CTRL_DIV_SEL_S);
sys/arm/freescale/vybrid/vf_anadig.c
167
reg |= (mfi << PLL4_CTRL_DIV_SEL_S);