PCLK_UART2
GATE(PCLK_UART2, "pclk_uart2", "pclk_cpu", 11, 9),
GATE(PCLK_UART2, "pclk_uart2", "pclk_bus", 16, 13),
GATE(PCLK_UART2, "pclk_uart2", "pclk_perilp1", 22, 2),
GATE(PCLK_UART2, "pclk_uart2", "pclk_bus", 28, 0),