PCIR_SECBUS_1
PCIR_SECBUS_1, 1);
PRIV_CFG_WR1(sc, PCIR_SECBUS_1, sc->sub_bus);
#define PCI_SECONDARY_BUS PCIR_SECBUS_1
sec_reg = PCIR_SECBUS_1;
sec_reg = PCIR_SECBUS_1;
pci_write_config(dev, PCIR_SECBUS_1,
PCIR_SECBUS_1, 1);
cfg->bridge.br_secbus = REG(PCIR_SECBUS_1, 1);
DBI_WR1(sc, PCIR_SECBUS_1, sc->sub_bus);
uint8_t secbus = pci_read_config(pcib, PCIR_SECBUS_1, 1);
sec_reg = PCIR_SECBUS_1;
PCIR_SECBUS_1, 1);
path->Function, PCIR_SECBUS_1, 1);
bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
bus = pci_read_config(dev, PCIR_SECBUS_1, 1);