sys/arm/mv/mv_pci.c

798

mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_PMBASEL_1,

sys/dev/pci/pci.c

5674

case PCIR_PMBASEL_1:

sys/dev/pci/pci.c

5765

case PCIR_PMBASEL_1:

sys/dev/pci/pci_pci.c

1625

pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);

sys/dev/pci/pci_pci.c

231

val = pci_read_config(dev, PCIR_PMBASEL_1, 2);

sys/dev/pci/pci_pci.c

238

pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);

sys/dev/pci/pci_pci.c

550

val = pci_read_config(dev, PCIR_PMBASEL_1, 2);

sys/dev/pci/pci_pci.c

556

pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);

sys/dev/pci/pci_pci.c

557

if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {

sys/dev/pci/pci_pci.c

559

pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);

sys/dev/pci/pci_pci.c

566

sc->pmem.reg = PCIR_PMBASEL_1;

sys/x86/iommu/intel_ctx.c

336

val = pci_read_config(root, PCIR_PMBASEL_1, 2);

usr.sbin/pciconf/pciconf.c

669

val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2);

usr.sbin/pciconf/pciconf.c

685

print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base,