PCIR_MEMBASE_1
val = bcm_pcib_read_config(dev, 0, 0, 0, PCIR_MEMBASE_1, 2);
bcm_pcib_write_config(dev, 0, 0, 0, PCIR_MEMBASE_1, val, 2);
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_MEMBASE_1,
case PCIR_MEMBASE_1:
case PCIR_MEMBASE_1:
pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
sc->mem.reg = PCIR_MEMBASE_1;
pci_read_config(dev, PCIR_MEMBASE_1, 2));
base = PCI_PPBMEMBASE(0, pci_read_config(root, PCIR_MEMBASE_1, 2));
read_config(fd, &p->pc_sel, PCIR_MEMBASE_1, 2));
print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit);