PCIR_HT_COMMAND
WREG(cfg->ht.ht_msimap + PCIR_HT_COMMAND, cfg->ht.ht_msictrl,
val = pci_read_config(child, ptr + PCIR_HT_COMMAND, 2);
val = pci_read_config(child, ptr + PCIR_HT_COMMAND, 2);
pci_write_config(dev, ht->ht_msimap + PCIR_HT_COMMAND,
pci_write_config(dev, ht->ht_msimap + PCIR_HT_COMMAND,
val = REG(ptr + PCIR_HT_COMMAND, 2);
val = PCIB_READ_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 2);
PCIB_WRITE_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 0x1, 1);
ptr + PCIR_HT_COMMAND, 0x10 + (i << 1), 1);
ptr + PCIR_HT_COMMAND, 0x11 + (i << 1), 1);
out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND,
out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND,
out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND,
out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND,
command = read_config(fd, &p->pc_sel, ptr + PCIR_HT_COMMAND, 2);