PCIR_INTLINE
if (reg == PCIR_INTLINE && bytes == 1) {
line = pci_docfgregread(domain, bus, slot, func, PCIR_INTLINE,
value = pci_cfgregread(domain, bus, device, func, PCIR_INTLINE,
pci_write_config(dev, PCIR_INTLINE, cfg->intline, 1);
} else if ((where >= PCIR_INTLINE && where + size <=
pci_write_config(dev, PCIR_INTLINE, 0x9, 1);
mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
MPT_CHECK(IntLine, PCIR_INTLINE, 1);
pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
pci_write_config(dev, PCIR_INTLINE, irq, 1);
pci_write_config(dev, PCIR_INTLINE, dinfo->cfg.intline, 1);
dinfo->cfg.intline = pci_read_config(dev, PCIR_INTLINE, 1);
cfg->intline = REG(PCIR_INTLINE, 1);
int_line = pci_read_config(self, PCIR_INTLINE, 4);
pci_write_config(self, PCIR_INTLINE, int_line, 4);
if (reg == PCIR_INTLINE && bytes == 1) {
line = pci_docfgregread(domain, bus, slot, func, PCIR_INTLINE,
value = pci_cfgregread(0, bus, device, func, PCIR_INTLINE, 1);
PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE,
PCIR_INTLINE, PCI_INVALID_IRQ, 1);
pci_set_cfgdata8(pdi, PCIR_INTLINE, 255);
pci_set_cfgdata8(pi, PCIR_INTLINE, pci_irq_intline(irq));
intline = pci_get_cfgdata8(pi, PCIR_INTLINE);
pci_set_cfgdata8(pi, PCIR_INTLINE, intline);