PCIM_CMD_MEMEN
cmd &= ~(PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
cmd |= PCIM_CMD_MEMEN;
cmd &= ~(PCIM_CMD_PORTEN | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
PCIM_CMD_MEMEN | PCIM_CMD_PORTEN;
command &= ~(PCIM_CMD_MEMEN | PCIM_CMD_PORTEN);
command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN |
PRIV_CFG_WR2(sc, PCIR_COMMAND, PCIM_CMD_MEMEN |
#define PCI_COMMAND_MEMORY PCIM_CMD_MEMEN
PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
PNTX_WRITE(sc, PCIR_COMMAND, PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
bit = PCIM_CMD_MEMEN;
bit = PCIM_CMD_MEMEN;
return (pci_read_config(dev, PCIR_COMMAND, 2) & PCIM_CMD_MEMEN) != 0;
cmd & ~(PCI_BAR_MEM(map) ? PCIM_CMD_MEMEN : PCIM_CMD_PORTEN), 2);
return ((cmd & PCIM_CMD_MEMEN) != 0);
cmd |= PCIM_CMD_MEMEN;
cmd & ~(PCI_BAR_MEM(map) ? PCIM_CMD_MEMEN : PCIM_CMD_PORTEN), 2);
PCIR_COMMAND, 2) & ~(PCIM_CMD_MEMEN | PCIM_CMD_PORTEN), 2);
PCIM_CMD_PORTEN | PCIM_CMD_MEMEN |
if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0)
if ((command & PCIM_CMD_MEMEN) == 0) {
cfgreg |= PCIM_CMD_SERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN |
if (changed & PCIM_CMD_MEMEN) {
if (new & PCIM_CMD_MEMEN)
return (cmd & PCIM_CMD_MEMEN);
enbit = PCIM_CMD_MEMEN;