NVMEM
nc->nc_sqe.fuse &= ~NVMEM(NVME_CMD_PSDT);
cc &= ~(NVMEM(NVME_CC_REG_SHN) | NVMEM(NVME_CC_REG_AMS) |
NVMEM(NVME_CC_REG_MPS) | NVMEM(NVME_CC_REG_CSS));
cc &= ~(NVMEM(NVME_CC_REG_IOCQES) | NVMEM(NVME_CC_REG_IOSQES) |
NVMEM(NVME_CC_REG_SHN) | NVMEM(NVME_CC_REG_AMS) |
NVMEM(NVME_CC_REG_MPS) | NVMEM(NVME_CC_REG_CSS));
nsdata->dlfeat = NVMEM(NVME_NS_DATA_DLFEAT_DWZ) |
nsdata->nsfeat = NVMEM(NVME_NS_DATA_NSFEAT_THIN_PROV) |
NVMEM(NVME_NS_DATA_NSFEAT_DEALLOC);
nsdata->dlfeat = NVMEM(NVME_NS_DATA_DLFEAT_DWZ) |
status &= ~NVMEM(NVME_STATUS_P);
cc &= ~NVMEM(NVME_CC_REG_SHN);
cc &= ~NVMEM(NVME_CC_REG_EN);
parent_cpl.status &= ~NVMEM(NVME_STATUS_SC);
ctrlr->csts &= ~NVMEM(NVME_CSTS_REG_SHST);
ctrlr->csts &= ~NVMEM(NVME_CSTS_REG_RDY);
ctrlr->cc &= ~NVMEM(NVME_CC_REG_EN);
ctrlr->csts &= ~NVMEM(NVME_CSTS_REG_SHST);
ctrlr->cc &= ~NVMEM(NVME_CC_REG_EN);
NVMEM(NVME_CTRLR_DATA_VWC_PRESENT);
nc->nc_sqe.fuse &= ~NVMEM(NVME_CMD_PSDT);
c->csts &= ~NVMEM(NVME_CSTS_REG_SHST);
cc &= ~(NVMEM(NVME_CC_REG_IOCQES) | NVMEM(NVME_CC_REG_IOSQES) |
NVMEM(NVME_CC_REG_SHN) | NVMEM(NVME_CC_REG_AMS) |
NVMEM(NVME_CC_REG_MPS) | NVMEM(NVME_CC_REG_CSS));
status |= NVMEM(NVME_STATUS_DNR);
sc->regs.csts &= ~NVMEM(NVME_CSTS_REG_SHST);
(NVMEM(NVME_CC_REG_EN) | \
NVMEM(NVME_CC_REG_IOSQES) | \
NVMEM(NVME_CC_REG_IOCQES))
(NVMEM(NVME_CC_REG_CSS) | \
NVMEM(NVME_CC_REG_MPS) | \
NVMEM(NVME_CC_REG_AMS))
(NVMEM(NVME_STATUS_SCT) | \
NVMEM(NVME_STATUS_SC))
#define NVME_ONCS_DSM NVMEM(NVME_CTRLR_DATA_ONCS_DSM)
cd->oaes = NVMEM(NVME_CTRLR_DATA_OAES_NS_ATTR);
cd->frmw = NVMEM(NVME_CTRLR_DATA_FRMW_SLOT1_RO) |
cd->fna = NVMEM(NVME_CTRLR_DATA_FNA_FORMAT_ALL);
csts &= ~NVMEM(NVME_CSTS_REG_SHST);