NVMEF
NVMEF(NVME_STATUS_SCT, NVME_SCT_COMMAND_SPECIFIC) |
NVMEF(NVME_STATUS_SC, NVMF_FABRIC_SC_INVALID_PARAM));
cdata->lpa = NVMEF(NVME_CTRLR_DATA_LPA_EXT_DATA, 1);
NVMEF(NVME_CTRLR_DATA_SGLS_TRANSPORT_DATA_BLOCK, 1) |
NVMEF(NVME_CTRLR_DATA_SGLS_ADDRESS_AS_OFFSET, 1) |
NVMEF(NVME_CTRLR_DATA_SGLS_NVM_COMMAND_SET, 1));
status = NVMEF(NVME_STATUS_SCT, sc_type) |
NVMEF(NVME_STATUS_SC, sc_status);
nc->nc_sqe.fuse |= NVMEF(NVME_CMD_PSDT, NVME_PSDT_SGL);
cc |= NVMEF(NVME_CC_REG_EN, 1);
cc |= NVMEF(NVME_CC_REG_IOCQES, 4); /* CQE entry size == 16 */
cc |= NVMEF(NVME_CC_REG_IOSQES, 6); /* SEQ entry size == 64 */
cc |= NVMEF(NVME_CC_REG_AMS, 0); /* AMS 0 (Round-robin) */
cc |= NVMEF(NVME_CC_REG_MPS, mps);
cc |= NVMEF(NVME_CC_REG_CSS, 0); /* NVM command set */
cc |= NVMEF(NVME_CC_REG_EN, 1); /* EN = 1 */
cc |= NVMEF(NVME_CC_REG_SHN, NVME_SHN_NORMAL);
nsdata.flbas |= NVMEF(NVME_NS_DATA_FLBAS_FORMAT,
nsdata.flbas |= NVMEF(NVME_NS_DATA_FLBAS_EXTENDED,
nsdata.dps |= NVMEF(NVME_NS_DATA_DPS_MD_START,
nsdata.dps |= NVMEF(NVME_NS_DATA_DPS_PIT,
nsdata.nmic = NVMEF(NVME_NS_DATA_NMIC_MAY_BE_SHARED, !!cd.mic);
NVMEF(NVME_NS_DATA_DLFEAT_READ, NVME_NS_DATA_DLFEAT_READ_00);
nsdata->flbas = NVMEF(NVME_NS_DATA_FLBAS_FORMAT, 0);
nsdata->lbaf[0] = NVMEF(NVME_NS_DATA_LBAF_LBADS,
NVMEF(NVME_NS_DATA_DLFEAT_READ, NVME_NS_DATA_DLFEAT_READ_00);
nsdata->flbas = NVMEF(NVME_NS_DATA_FLBAS_FORMAT, 0);
nsdata->lbaf[0] = NVMEF(NVME_NS_DATA_LBAF_LBADS,
status = NVMEF(NVME_STATUS_SCT, sc_type) |
NVMEF(NVME_STATUS_SC, sc_status);
cc |= NVMEF(NVME_CC_REG_SHN, NVME_SHN_NORMAL);
aqa |= NVMEF(NVME_AQA_REG_ACQS, qsize);
aqa |= NVMEF(NVME_AQA_REG_ASQS, qsize);
cc |= NVMEF(NVME_CC_REG_EN, 1);
cc |= NVMEF(NVME_CC_REG_CSS, 0);
cc |= NVMEF(NVME_CC_REG_AMS, 0);
cc |= NVMEF(NVME_CC_REG_SHN, 0);
cc |= NVMEF(NVME_CC_REG_IOSQES, 6); /* SQ entry size == 64 == 2^6 */
cc |= NVMEF(NVME_CC_REG_IOCQES, 4); /* CQ entry size == 16 == 2^4 */
cc |= NVMEF(NVME_CC_REG_MPS, ctrlr->mps);
parent_cpl.status |= NVMEF(NVME_STATUS_SC,
status |= NVMEF(NVME_STATUS_SCT, sct);
status |= NVMEF(NVME_STATUS_SC, sc);
status |= NVMEF(NVME_STATUS_DNR, dnr);
np->cdata.oncs = htole16(NVMEF(NVME_CTRLR_DATA_ONCS_VERIFY, 1) |
NVMEF(NVME_CTRLR_DATA_ONCS_WRZERO, 1) |
NVMEF(NVME_CTRLR_DATA_ONCS_DSM, 1) |
NVMEF(NVME_CTRLR_DATA_ONCS_COMPARE, 1));
np->cdata.fuses = NVMEF(NVME_CTRLR_DATA_FUSES_CNW, 1);
np->fp.afi = NVMEF(NVME_FIRMWARE_PAGE_AFI_SLOT, 1);
cpl.cdw0 = htole32(NVMEF(NVME_ASYNC_EVENT_TYPE, type) |
NVMEF(NVME_ASYNC_EVENT_INFO, info) |
NVMEF(NVME_ASYNC_EVENT_LOG_PAGE_ID, log_page_id));
ctrlr->csts |= NVMEF(NVME_CSTS_REG_SHST, NVME_SHST_COMPLETE);
ctrlr->csts |= NVMEF(NVME_CSTS_REG_CFS, 1);
ctrlr->csts |= NVMEF(NVME_CSTS_REG_SHST, NVME_SHST_OCCURRING);
ctrlr->csts |= NVMEF(NVME_CSTS_REG_RDY, 1);
status = NVMEF(NVME_STATUS_SCT, sc_type) |
NVMEF(NVME_STATUS_SC, sc_status);
status = NVMEF(NVME_STATUS_SCT, NVME_SCT_GENERIC) |
NVMEF(NVME_STATUS_SC, sc_status);
status = NVMEF(NVME_STATUS_SCT, sc_type) |
NVMEF(NVME_STATUS_SC, sc_status);
NVMEF(NVME_STATUS_SCT, NVME_SCT_COMMAND_SPECIFIC) |
NVMEF(NVME_STATUS_SC, NVMF_FABRIC_SC_INVALID_PARAM));
NVMEF(NVME_CTRLR_DATA_CTRATT_128BIT_HOSTID, 1) |
NVMEF(NVME_CTRLR_DATA_CTRATT_TBKAS, 1));
cdata->frmw = NVMEF(NVME_CTRLR_DATA_FRMW_SLOT1_RO, 1) |
NVMEF(NVME_CTRLR_DATA_FRMW_NUM_SLOTS, 1);
cdata->lpa = NVMEF(NVME_CTRLR_DATA_LPA_EXT_DATA, 1);
cdata->sqes = NVMEF(NVME_CTRLR_DATA_SQES_MAX, 6) |
NVMEF(NVME_CTRLR_DATA_SQES_MIN, 6);
cdata->cqes = NVMEF(NVME_CTRLR_DATA_CQES_MAX, 4) |
NVMEF(NVME_CTRLR_DATA_CQES_MIN, 4);
NVMEF(NVME_CTRLR_DATA_VWC_ALL, NVME_CTRLR_DATA_VWC_ALL_NO) |
NVMEF(NVME_CTRLR_DATA_SGLS_TRANSPORT_DATA_BLOCK, 1) |
NVMEF(NVME_CTRLR_DATA_SGLS_ADDRESS_AS_OFFSET, 1) |
NVMEF(NVME_CTRLR_DATA_SGLS_NVM_COMMAND_SET, 1));
caphi = NVMEF(NVME_CAP_HI_REG_CMBS, 0) |
NVMEF(NVME_CAP_HI_REG_PMRS, 0);
caphi |= NVMEF(NVME_CAP_HI_REG_MPSMAX, mps) |
NVMEF(NVME_CAP_HI_REG_MPSMIN, mps);
caphi |= NVMEF(NVME_CAP_HI_REG_BPS, 0) |
NVMEF(NVME_CAP_HI_REG_CSS, NVME_CAP_HI_REG_CSS_NVM_MASK) |
NVMEF(NVME_CAP_HI_REG_NSSRS, 0) |
NVMEF(NVME_CAP_HI_REG_DSTRD, 0);
caplo = NVMEF(NVME_CAP_LO_REG_TO, enable_timeout) |
NVMEF(NVME_CAP_LO_REG_AMS, 0) |
NVMEF(NVME_CAP_LO_REG_CQR, 1);
caplo |= NVMEF(NVME_CAP_LO_REG_MQES, max_io_qsize - 1);
cc |= NVMEF(NVME_CC_REG_SHN, NVME_SHN_NORMAL);
cqe.status = htole16(NVMEF(NVME_STATUS_SCT, NVME_SCT_PATH_RELATED) |
NVMEF(NVME_STATUS_SC, NVME_SC_COMMAND_ABORTED_BY_HOST));
nc->nc_sqe.fuse |= NVMEF(NVME_CMD_PSDT, NVME_PSDT_SGL);
c->csts |= NVMEF(NVME_CSTS_REG_SHST, NVME_SHST_COMPLETE);
c->csts |= NVMEF(NVME_CSTS_REG_RDY, 1);
nsdata->flbas = NVMEF(NVME_NS_DATA_FLBAS_FORMAT, 0);
nsdata->lbaf[0] = NVMEF(NVME_NS_DATA_LBAF_LBADS,
ioc->fp.afi = NVMEF(NVME_FIRMWARE_PAGE_AFI_SLOT, 1);
cc |= NVMEF(NVME_CC_REG_IOCQES, 4); /* CQE entry size == 16 */
cc |= NVMEF(NVME_CC_REG_IOSQES, 6); /* SQE entry size == 64 */
cc |= NVMEF(NVME_CC_REG_AMS, 0); /* AMS 0 (Round-robin) */
cc |= NVMEF(NVME_CC_REG_MPS, mps);
cc |= NVMEF(NVME_CC_REG_CSS, 0); /* NVM command set */
cc |= NVMEF(NVME_CC_REG_EN, 1); /* EN = 1 */
cc |= NVMEF(NVME_CC_REG_SHN, NVME_SHN_NORMAL);
NVMEF(NVME_CAP_LO_REG_CQR, 1) |
NVMEF(NVME_CAP_LO_REG_TO, 60);
sc->regs.cap_hi = NVMEF(NVME_CAP_HI_REG_CSS_NVM, 1);
sc->regs.csts |= NVMEF(NVME_CSTS_REG_SHST,
#define NVME_CSTS_RDY (NVMEF(NVME_CSTS_REG_RDY, 1))
#define NVME_CSTS_CFS (NVMEF(NVME_CSTS_REG_CFS, 1))
#define NVME_STATUS_P (NVMEF(NVME_STATUS_P, 1))
*status |= NVMEF(NVME_STATUS_SCT, type) | NVMEF(NVME_STATUS_SC, code);
cd->oacs = NVMEF(NVME_CTRLR_DATA_OACS_FORMAT, 1);
NVMEF(NVME_CTRLR_DATA_FRMW_NUM_SLOTS, 1);
cd->sanicap = NVMEF(NVME_CTRLR_DATA_SANICAP_NODMMAS,
cd->sqes = NVMEF(NVME_CTRLR_DATA_SQES_MAX, 6) |
NVMEF(NVME_CTRLR_DATA_SQES_MIN, 6);
cd->cqes = NVMEF(NVME_CTRLR_DATA_CQES_MAX, 4) |
NVMEF(NVME_CTRLR_DATA_CQES_MIN, 4);
cd->vwc = NVMEF(NVME_CTRLR_DATA_VWC_ALL, NVME_CTRLR_DATA_VWC_ALL_NO);
nd->lbaf[0] = NVMEF(NVME_NS_DATA_LBAF_LBADS, nvstore->sectsz_bits);
sc->fw_log.afi = NVMEF(NVME_FIRMWARE_PAGE_AFI_SLOT, 1);
csts |= NVMEF(NVME_CSTS_REG_SHST, NVME_SHST_COMPLETE);
csts |= NVMEF(NVME_CSTS_REG_RDY, 1);