sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1274

ossaHwRegWrite(agRoot, MSGU_ODMR, ODMR_CLEAR_ALL);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1516

ossaHwRegWrite(agRoot, MSGU_ODMR, ODMR_CLEAR_ALL);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2730

{ GEN_MSGU_ODMR, PCIBAR0, MSGU_ODMR, SIZE_DW }, /* 0x0b */

sys/dev/pms/RefTisa/sallsdk/spc/sahwreg.h

217

#define MSGU_READ_ODMR siHalRegReadExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR)

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1014

ODMRValue = siHalRegReadExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1017

siHalRegWriteExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR, ODMRValue);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1059

siHalRegWriteExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR, ODMR_CLEAR_ALL);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1381

siHalRegWriteExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR,AGSA_INTERRUPT_HANDLE_ALL_CHANNELS );

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1425

siHalRegWriteExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR, 0);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1433

siHalRegWriteExt(agRoot, GEN_MSGU_ODMR, MSGU_ODMR,AGSA_INTERRUPT_HANDLE_ALL_CHANNELS );

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

540

ODMRValue = ossaHwRegRead(agRoot, MSGU_ODMR);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

543

ossaHwRegWrite(agRoot, MSGU_ODMR, ODMRValue);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

584

ossaHwRegWrite(agRoot, MSGU_ODMR, ODMR_MASK_ALL);