Symbol: MLX5_IB_RROCE_ECN_RP
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
703
m(+1, u64, rp_0_enable, "rp_0_enable", "Enable reaction point, priority 0", MLX5_IB_RROCE_ECN_RP, 0, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
704
m(+1, u64, rp_1_enable, "rp_1_enable", "Enable reaction point, priority 1", MLX5_IB_RROCE_ECN_RP, 1, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
705
m(+1, u64, rp_2_enable, "rp_2_enable", "Enable reaction point, priority 2", MLX5_IB_RROCE_ECN_RP, 2, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
706
m(+1, u64, rp_3_enable, "rp_3_enable", "Enable reaction point, priority 3", MLX5_IB_RROCE_ECN_RP, 3, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
707
m(+1, u64, rp_4_enable, "rp_4_enable", "Enable reaction point, priority 4", MLX5_IB_RROCE_ECN_RP, 4, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
708
m(+1, u64, rp_5_enable, "rp_5_enable", "Enable reaction point, priority 5", MLX5_IB_RROCE_ECN_RP, 5, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
709
m(+1, u64, rp_6_enable, "rp_6_enable", "Enable reaction point, priority 6", MLX5_IB_RROCE_ECN_RP, 6, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
710
m(+1, u64, rp_7_enable, "rp_7_enable", "Enable reaction point, priority 7", MLX5_IB_RROCE_ECN_RP, 7, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
711
m(+1, u64, rp_8_enable, "rp_8_enable", "Enable reaction point, priority 8", MLX5_IB_RROCE_ECN_RP, 8, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
712
m(+1, u64, rp_9_enable, "rp_9_enable", "Enable reaction point, priority 9", MLX5_IB_RROCE_ECN_RP, 9, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
713
m(+1, u64, rp_10_enable, "rp_10_enable", "Enable reaction point, priority 10", MLX5_IB_RROCE_ECN_RP, 10, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
714
m(+1, u64, rp_11_enable, "rp_11_enable", "Enable reaction point, priority 11", MLX5_IB_RROCE_ECN_RP, 11, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
715
m(+1, u64, rp_12_enable, "rp_12_enable", "Enable reaction point, priority 12", MLX5_IB_RROCE_ECN_RP, 12, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
716
m(+1, u64, rp_13_enable, "rp_13_enable", "Enable reaction point, priority 13", MLX5_IB_RROCE_ECN_RP, 13, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
717
m(+1, u64, rp_14_enable, "rp_14_enable", "Enable reaction point, priority 14", MLX5_IB_RROCE_ECN_RP, 14, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
718
m(+1, u64, rp_15_enable, "rp_15_enable", "Enable reaction point, priority 15", MLX5_IB_RROCE_ECN_RP, 15, enable) \
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
90
return MLX5_IB_RROCE_ECN_RP;