MLX5_GET - FreeBSD

sys/dev/mlx5/device.h

1051

MLX5_GET(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)

sys/dev/mlx5/device.h

1057

MLX5_GET(cmd_hca_cap, mdev->hca_caps_max[MLX5_CAP_GENERAL], cap)

sys/dev/mlx5/device.h

1060

MLX5_GET(cmd_hca_cap_2, mdev->hca_caps_cur[MLX5_CAP_GENERAL_2], cap)

sys/dev/mlx5/device.h

1063

MLX5_GET(per_protocol_networking_offload_caps,\

sys/dev/mlx5/device.h

1067

MLX5_GET(per_protocol_networking_offload_caps,\

sys/dev/mlx5/device.h

1071

MLX5_GET(roce_cap, mdev->hca_caps_cur[MLX5_CAP_ROCE], cap)

sys/dev/mlx5/device.h

1074

MLX5_GET(roce_cap, mdev->hca_caps_max[MLX5_CAP_ROCE], cap)

sys/dev/mlx5/device.h

1077

MLX5_GET(atomic_caps, mdev->hca_caps_cur[MLX5_CAP_ATOMIC], cap)

sys/dev/mlx5/device.h

1080

MLX5_GET(atomic_caps, mdev->hca_caps_max[MLX5_CAP_ATOMIC], cap)

sys/dev/mlx5/device.h

1083

MLX5_GET(flow_table_nic_cap, mdev->hca_caps_cur[MLX5_CAP_FLOW_TABLE], cap)

sys/dev/mlx5/device.h

1089

MLX5_GET(flow_table_nic_cap, mdev->hca_caps_max[MLX5_CAP_FLOW_TABLE], cap)

sys/dev/mlx5/device.h

1128

MLX5_GET(flow_table_eswitch_cap, \

sys/dev/mlx5/device.h

1132

MLX5_GET(flow_table_eswitch_cap, \

sys/dev/mlx5/device.h

1160

MLX5_GET(e_switch_cap, \

sys/dev/mlx5/device.h

1168

MLX5_GET(e_switch_cap, \

sys/dev/mlx5/device.h

1172

MLX5_GET(port_selection_cap, \

sys/dev/mlx5/device.h

1176

MLX5_GET(port_selection_cap, \

sys/dev/mlx5/device.h

1180

MLX5_GET(adv_virtualization_cap, \

sys/dev/mlx5/device.h

1184

MLX5_GET(adv_virtualization_cap, \

sys/dev/mlx5/device.h

1194

MLX5_GET(odp_cap, mdev->hca_caps_cur[MLX5_CAP_ODP], cap)

sys/dev/mlx5/device.h

1197

MLX5_GET(odp_cap, mdev->hca_caps_max[MLX5_CAP_ODP], cap)

sys/dev/mlx5/device.h

1200

MLX5_GET(snapshot_cap, \

sys/dev/mlx5/device.h

1204

MLX5_GET(snapshot_cap, \

sys/dev/mlx5/device.h

1208

MLX5_GET(per_protocol_networking_offload_caps,\

sys/dev/mlx5/device.h

1212

MLX5_GET(per_protocol_networking_offload_caps,\

sys/dev/mlx5/device.h

1216

MLX5_GET(debug_cap, \

sys/dev/mlx5/device.h

1220

MLX5_GET(debug_cap, \

sys/dev/mlx5/device.h

1224

MLX5_GET(qos_cap,\

sys/dev/mlx5/device.h

1228

MLX5_GET(qos_cap,\

sys/dev/mlx5/device.h

1232

MLX5_GET(pcam_reg, (mdev)->caps.pcam, feature_cap_mask.enhanced_features.fld)

sys/dev/mlx5/device.h

1235

MLX5_GET(pcam_reg, (mdev)->caps.pcam, port_access_reg_cap_mask.regs_5000_to_507f.reg)

sys/dev/mlx5/device.h

1238

MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_feature_cap_mask.enhanced_features.fld)

sys/dev/mlx5/device.h

1241

MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_access_reg_cap_mask.access_regs.reg)

sys/dev/mlx5/device.h

1244

MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_access_reg_cap_mask.reg_cap.fld)

sys/dev/mlx5/device.h

1247

MLX5_GET(qcam_reg, (mdev)->caps.qcam, qos_feature_cap_mask.feature_cap.fld)

sys/dev/mlx5/device.h

1250

MLX5_GET(fpga_cap, (mdev)->caps.fpga, cap)

sys/dev/mlx5/device.h

1256

MLX5_GET(tls_capabilities, (mdev)->hca_caps_cur[MLX5_CAP_TLS], cap)

sys/dev/mlx5/device.h

1262

MLX5_GET(ipsec_cap, (mdev)->hca_caps_cur[MLX5_CAP_IPSEC], cap)

sys/dev/mlx5/device.h

136

tmp = (__force type_t)MLX5_GET(typ, p, fld); \

sys/dev/mlx5/device.h

139

tmp = (__force type_t)cpu_to_be16(MLX5_GET(typ, p, fld)); \

sys/dev/mlx5/device.h

142

tmp = (__force type_t)cpu_to_be32(MLX5_GET(typ, p, fld)); \

sys/dev/mlx5/device.h

94

u32 ___t = MLX5_GET(typ, p, fld); \

sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c

174

MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);

sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c

403

!MLX5_GET(ipsec_aso, aso->ctx, esn_event_arm)) {

sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c

404

u32 mode_param = MLX5_GET(ipsec_aso, aso->ctx, mode_parameter);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

1036

op = MLX5_GET(mbox_in, in->first.data, opcode);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

1292

return MLX5_GET(mbox_in, in, opcode) == MLX5_CMD_OP_MANAGE_PAGES;

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

1310

u16 opcode = MLX5_GET(mbox_in, in, opcode);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

690

*status = MLX5_GET(mbox_out, out, status);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

691

*syndrome = MLX5_GET(mbox_out, out, syndrome);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

705

opcode = MLX5_GET(mbox_in, in, opcode);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

706

op_mod = MLX5_GET(mbox_in, in, op_mod);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

723

u16 op = MLX5_GET(mbox_in, ent->lay->in, opcode);

sys/dev/mlx5/mlx5_core/mlx5_cmd.c

785

return MLX5_GET(mbox_in, in->first.data, opcode);

sys/dev/mlx5/mlx5_core/mlx5_cq.c

139

cq->cqn = MLX5_GET(create_cq_out, out, cqn);

sys/dev/mlx5/mlx5_core/mlx5_crypto.c

76

*p_obj_id = MLX5_GET(create_encryption_key_out, out, obj_id);

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

161

temp = MLX5_GET(diagnostic_cntr_struct, cnt, counter_value_h);

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

163

MLX5_GET(diagnostic_cntr_struct, cnt, counter_value_l);

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

166

MLX5_GET(diagnostic_cntr_struct, cnt, counter_id),

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

167

MLX5_GET(diagnostic_cntr_struct, cnt, sample_id),

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

168

MLX5_GET(diagnostic_cntr_struct, cnt, time_stamp_31_0),

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

448

MLX5_GET(diagnostic_params_context, ctx, single));

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

450

MLX5_GET(diagnostic_params_context, ctx, repetitive));

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

452

MLX5_GET(diagnostic_params_context, ctx, sync));

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

454

MLX5_GET(diagnostic_params_context, ctx, clear));

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

456

MLX5_GET(diagnostic_params_context, ctx, on_demand));

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

458

MLX5_GET(diagnostic_params_context, ctx, enable));

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

460

MLX5_GET(diagnostic_params_context, ctx,

sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c

467

MLX5_GET(counter_id, cnt_id, counter_id));

sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c

195

u16 counter_id = MLX5_GET(

sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c

243

MLX5_GET(pcie_perf_counters,

sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c

246

MLX5_GET(pcie_perf_counters,

sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c

259

MLX5_GET(pcie_timers_states,

sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c

262

MLX5_GET(pcie_timers_states,

sys/dev/mlx5/mlx5_core/mlx5_eq.c

476

eq->eqn = MLX5_GET(create_eq_out, out, eq_number);

sys/dev/mlx5/mlx5_core/mlx5_eswitch.c

151

cvlan_strip = MLX5_GET(query_esw_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_eswitch.c

154

cvlan_insert = MLX5_GET(query_esw_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_eswitch.c

158

*vlan = MLX5_GET(query_esw_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_eswitch.c

160

*qos = MLX5_GET(query_esw_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c

253

ft->id = MLX5_GET(create_flow_table_out, out,

sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c

348

fg->id = MLX5_GET(create_flow_group_out, out,

sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c

702

*id = MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);

sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c

816

pkt_reformat->id = MLX5_GET(alloc_packet_reformat_context_out,

sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c

901

modify_hdr->id = MLX5_GET(alloc_modify_header_context_out, out, modify_header_id);

sys/dev/mlx5/mlx5_core/mlx5_fs_core.c

1277

u8 match_criteria_enable = MLX5_GET(create_flow_group_in,

sys/dev/mlx5/mlx5_core/mlx5_fs_core.c

1280

int start_index = MLX5_GET(create_flow_group_in, fg_in,

sys/dev/mlx5/mlx5_core/mlx5_fs_core.c

1282

int end_index = MLX5_GET(create_flow_group_in, fg_in,

sys/dev/mlx5/mlx5_core/mlx5_fs_core.c

1531

src_esw_owner_mask_on = !!MLX5_GET(fte_match_set_misc, misc,

sys/dev/mlx5/mlx5_core/mlx5_fw.c

108

dev->special_contexts.resd_lkey = MLX5_GET(query_special_contexts_out,

sys/dev/mlx5/mlx5_core/mlx5_fw.c

297

force_state = MLX5_GET(teardown_hca_out, out, state);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

328

state = MLX5_GET(teardown_hca_out, out, state);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

415

*update_handle = MLX5_GET(mcc_reg, out, update_handle);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

416

*error_code = MLX5_GET(mcc_reg, out, error_code);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

417

*control_state = MLX5_GET(mcc_reg, out, control_state);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

476

*max_component_size = MLX5_GET(mcqi_cap, out + offset, max_component_size);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

477

*log_mcda_word_size = MLX5_GET(mcqi_cap, out + offset, log_mcda_word_size);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

478

*mcda_max_write_size = MLX5_GET(mcqi_cap, out + offset, mcda_max_write_size);

sys/dev/mlx5/mlx5_core/mlx5_fw.c

83

*vendor_id = MLX5_GET(query_adapter_out, out,

sys/dev/mlx5/mlx5_core/mlx5_main.c

280

*p_status = MLX5_GET(mpein_reg, out, pwr_status);

sys/dev/mlx5/mlx5_core/mlx5_main.c

281

*p_power = MLX5_GET(mpein_reg, out, pci_power);

sys/dev/mlx5/mlx5_core/mlx5_main.c

656

sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

170

*mkey = MLX5_GET(query_special_contexts_out, out, dump_fill_mkey);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

179

case 1: return MLX5_GET(create_psv_out, out, psv1_index);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

180

case 2: return MLX5_GET(create_psv_out, out, psv2_index);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

181

case 3: return MLX5_GET(create_psv_out, out, psv3_index);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

182

default: return MLX5_GET(create_psv_out, out, psv0_index);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

91

mkey_index = MLX5_GET(create_mkey_out, lout, mkey_index);

sys/dev/mlx5/mlx5_core/mlx5_mr.c

95

mkey->pd = MLX5_GET(mkc, mkc, pd);

sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c

313

*npages = MLX5_GET(query_pages_out, out, num_pages);

sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c

314

*func_id = MLX5_GET(query_pages_out, out, function_id);

sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c

398

npages = MLX5_GET(manage_pages_in, in, input_num_entries);

sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c

399

func_id = MLX5_GET(manage_pages_in, in, function_id);

sys/dev/mlx5/mlx5_core/mlx5_pagealloc.c

446

num_claimed = MLX5_GET(manage_pages_out, out, output_num_entries);

sys/dev/mlx5/mlx5_core/mlx5_pd.c

47

*pdn = MLX5_GET(alloc_pd_out, out, pd);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1026

bw_pct[i] = MLX5_GET(ets_tcn_config_reg, ets_tcn_conf, bw_allocation);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1106

*trust_state = MLX5_GET(qpts_reg, out, trust_state);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1205

ecc = MLX5_GET(pddr_reg, pddr_reg, page_data.pddr_module_info.ethernet_compliance_code);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1206

ci = MLX5_GET(pddr_reg, pddr_reg, page_data.pddr_module_info.cable_identifier);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1235

*cable_type = MLX5_GET(pddr_reg, pddr_reg, page_data.pddr_module_info.cable_type);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1252

*monitor_opcode = MLX5_GET(pddr_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

1275

*reset_level = MLX5_GET(mfrl_reg, mfrl, reset_level);

sys/dev/mlx5/mlx5_core/mlx5_port.c

1456

prio_x_buff = MLX5_GET(pptb_reg, out, prio_x_buff);

sys/dev/mlx5/mlx5_core/mlx5_port.c

174

*proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);

sys/dev/mlx5/mlx5_core/mlx5_port.c

176

*proto_cap = MLX5_GET(ptys_reg, out, ib_proto_capability);

sys/dev/mlx5/mlx5_core/mlx5_port.c

192

*an_disable_status = MLX5_GET(ptys_reg, out, an_disable_admin);

sys/dev/mlx5/mlx5_core/mlx5_port.c

193

*an_disable_cap = MLX5_GET(ptys_reg, out, an_disable_cap);

sys/dev/mlx5/mlx5_core/mlx5_port.c

238

*proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);

sys/dev/mlx5/mlx5_core/mlx5_port.c

240

*proto_admin = MLX5_GET(ptys_reg, out, ib_proto_admin);

sys/dev/mlx5/mlx5_core/mlx5_port.c

257

*proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);

sys/dev/mlx5/mlx5_core/mlx5_port.c

317

*status = MLX5_GET(paos_reg, out, oper_status);

sys/dev/mlx5/mlx5_core/mlx5_port.c

333

*status = MLX5_GET(paos_reg, out, admin_status);

sys/dev/mlx5/mlx5_core/mlx5_port.c

353

*max_mtu = MLX5_GET(pmtu_reg, out, max_mtu);

sys/dev/mlx5/mlx5_core/mlx5_port.c

355

*oper_mtu = MLX5_GET(pmtu_reg, out, oper_mtu);

sys/dev/mlx5/mlx5_core/mlx5_port.c

357

*admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);

sys/dev/mlx5/mlx5_core/mlx5_port.c

420

*rx_pause = MLX5_GET(pfcc_reg, out, pprx);

sys/dev/mlx5/mlx5_core/mlx5_port.c

421

*tx_pause = MLX5_GET(pfcc_reg, out, pptx);

sys/dev/mlx5/mlx5_core/mlx5_port.c

439

*pfc_en_tx = MLX5_GET(pfcc_reg, out, pfctx);

sys/dev/mlx5/mlx5_core/mlx5_port.c

441

*pfc_en_rx = MLX5_GET(pfcc_reg, out, pfcrx);

sys/dev/mlx5/mlx5_core/mlx5_port.c

501

*timeout = MLX5_GET(query_delay_drop_params_out, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

539

pvlc->local_port = MLX5_GET(pvlc_reg, out, local_port);

sys/dev/mlx5/mlx5_core/mlx5_port.c

540

pvlc->vl_hw_cap = MLX5_GET(pvlc_reg, out, vl_hw_cap);

sys/dev/mlx5/mlx5_core/mlx5_port.c

541

pvlc->vl_admin = MLX5_GET(pvlc_reg, out, vl_admin);

sys/dev/mlx5/mlx5_core/mlx5_port.c

542

pvlc->vl_operational = MLX5_GET(pvlc_reg, out, vl_operational);

sys/dev/mlx5/mlx5_core/mlx5_port.c

594

ptys->local_port = MLX5_GET(ptys_reg, out, local_port);

sys/dev/mlx5/mlx5_core/mlx5_port.c

595

ptys->proto_mask = MLX5_GET(ptys_reg, out, proto_mask);

sys/dev/mlx5/mlx5_core/mlx5_port.c

596

ptys->eth_proto_cap = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

598

ptys->ib_link_width_cap = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

600

ptys->ib_proto_cap = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

602

ptys->eth_proto_admin = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

604

ptys->ib_link_width_admin = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

606

ptys->ib_proto_admin = MLX5_GET(ptys_reg, out, ib_proto_admin);

sys/dev/mlx5/mlx5_core/mlx5_port.c

607

ptys->eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);

sys/dev/mlx5/mlx5_core/mlx5_port.c

608

ptys->ib_link_width_oper = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

610

ptys->ib_proto_oper = MLX5_GET(ptys_reg, out, ib_proto_oper);

sys/dev/mlx5/mlx5_core/mlx5_port.c

611

ptys->eth_proto_lp_advertise = MLX5_GET(ptys_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

664

pmtu->local_port = MLX5_GET(pmtu_reg, out, local_port);

sys/dev/mlx5/mlx5_core/mlx5_port.c

665

pmtu->max_mtu = mtu_to_ib_mtu(dev, MLX5_GET(pmtu_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

667

pmtu->admin_mtu = mtu_to_ib_mtu(dev, MLX5_GET(pmtu_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

669

pmtu->oper_mtu = mtu_to_ib_mtu(dev, MLX5_GET(pmtu_reg, out,

sys/dev/mlx5/mlx5_core/mlx5_port.c

694

lane = MLX5_GET(pmlp_reg, out, lane0_module_mapping);

sys/dev/mlx5/mlx5_core/mlx5_port.c

725

status = MLX5_GET(mcia_reg, out, status);

sys/dev/mlx5/mlx5_core/mlx5_port.c

786

*wol_mode = MLX5_GET(query_wol_rol_out, out, wol_mode);

sys/dev/mlx5/mlx5_core/mlx5_port.c

808

*is_enable = MLX5_GET(query_cong_status_out, out, enable);

sys/dev/mlx5/mlx5_core/mlx5_port.c

888

max_bw_value[i] = MLX5_GET(ets_tcn_config_reg, ets_tcn_conf,

sys/dev/mlx5/mlx5_core/mlx5_port.c

890

max_bw_units[i] = MLX5_GET(ets_tcn_config_reg, ets_tcn_conf,

sys/dev/mlx5/mlx5_core/mlx5_port.c

938

*tc = MLX5_GET(qtct_reg, out, tclass);

sys/dev/mlx5/mlx5_core/mlx5_port.c

992

*tc_group = MLX5_GET(ets_tcn_config_reg, ets_tcn_conf,

sys/dev/mlx5/mlx5_core/mlx5_qp.c

134

qp->uid = MLX5_GET(create_qp_in, in, uid);

sys/dev/mlx5/mlx5_core/mlx5_qp.c

135

qp->qpn = MLX5_GET(create_qp_out, out, qpn);

sys/dev/mlx5/mlx5_core/mlx5_qp.c

342

*xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd);

sys/dev/mlx5/mlx5_core/mlx5_qp.c

377

dct->dctn = MLX5_GET(create_dct_out, out, dctn);

sys/dev/mlx5/mlx5_core/mlx5_qp.c

378

dct->uid = MLX5_GET(create_dct_in, in, uid);

sys/dev/mlx5/mlx5_core/mlx5_qp.c

504

rq->uid = MLX5_GET(create_rq_in, in, uid);

sys/dev/mlx5/mlx5_core/mlx5_qp.c

542

sq->uid = MLX5_GET(create_sq_in, in, uid);

sys/dev/mlx5/mlx5_core/mlx5_rl.c

88

*scq_handle = MLX5_GET(query_pp_rate_limit_out, out, pp_context.qos_handle);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

102

if (MLX5_GET(srqc, srqc, wq_signature))

sys/dev/mlx5/mlx5_core/mlx5_srq.c

104

in->log_page_size = MLX5_GET(srqc, srqc, log_page_size);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

105

in->wqe_shift = MLX5_GET(srqc, srqc, log_rq_stride);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

106

in->log_size = MLX5_GET(srqc, srqc, log_srq_size);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

107

in->page_offset = MLX5_GET(srqc, srqc, page_offset);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

108

in->lwm = MLX5_GET(srqc, srqc, lwm);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

109

in->pd = MLX5_GET(srqc, srqc, pd);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

198

if (MLX5_GET(rmpc, rmpc, state) != MLX5_RMPC_STATE_RDY)

sys/dev/mlx5/mlx5_core/mlx5_srq.c

269

if (MLX5_GET(xrc_srqc, xrc_srqc, state) != MLX5_XRC_SRQC_STATE_GOOD)

sys/dev/mlx5/mlx5_core/mlx5_srq.c

310

srq->srqn = MLX5_GET(create_srq_out, create_out, srqn);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

348

if (MLX5_GET(srqc, srqc, state) != MLX5_SRQC_STATE_GOOD)

sys/dev/mlx5/mlx5_core/mlx5_srq.c

89

if (MLX5_GET(wq, wq, wq_signature))

sys/dev/mlx5/mlx5_core/mlx5_srq.c

91

in->log_page_size = MLX5_GET(wq, wq, log_wq_pg_sz);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

92

in->wqe_shift = MLX5_GET(wq, wq, log_wq_stride) - 4;

sys/dev/mlx5/mlx5_core/mlx5_srq.c

93

in->log_size = MLX5_GET(wq, wq, log_wq_sz);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

94

in->page_offset = MLX5_GET(wq, wq, page_offset);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

95

in->lwm = MLX5_GET(wq, wq, lwm);

sys/dev/mlx5/mlx5_core/mlx5_srq.c

96

in->pd = MLX5_GET(wq, wq, pd);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

118

*sqn = MLX5_GET(create_sq_out, out, sqn);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

164

*tirn = MLX5_GET(create_tir_out, out, tirn);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

203

*tisn = MLX5_GET(create_tis_out, out, tisn);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

240

*rmpn = MLX5_GET(create_rmp_out, out, rmpn);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

314

*xsrqn = MLX5_GET(create_xrc_srq_out, out, xrc_srqn);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

377

*rqtn = MLX5_GET(create_rqt_out, out, rqtn);

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

45

*tdn = MLX5_GET(alloc_transport_domain_out, out,

sys/dev/mlx5/mlx5_core/mlx5_transobj.c

73

*rqn = MLX5_GET(create_rq_out, out, rqn);

sys/dev/mlx5/mlx5_core/mlx5_uar.c

44

*uarn = MLX5_GET(alloc_uar_out, out, uar);

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1286

*min_header = MLX5_GET(query_hca_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1359

*mtu = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1403

*min_header = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1469

*promisc_uc = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1471

*promisc_mc = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1473

*promisc_all = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

149

*counter_set_id = MLX5_GET(alloc_q_counter_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1603

*value = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1606

*value = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

1808

*vport_state = MLX5_GET(query_hca_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

207

*out_of_rx_buffer = MLX5_GET(query_q_counter_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

220

*min_inline = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

420

*qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

63

return MLX5_GET(query_vport_state_out, out, state);

sys/dev/mlx5/mlx5_core/mlx5_vport.c

73

return MLX5_GET(query_vport_state_out, out, admin_state);

sys/dev/mlx5/mlx5_core/mlx5_vport.c

759

req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

872

req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,

sys/dev/mlx5/mlx5_core/mlx5_vport.c

880

vlans[i] = MLX5_GET(vlan_layout, vlan_addr, vlan);

sys/dev/mlx5/mlx5_core/mlx5_vport.c

952

*enable = MLX5_GET(query_nic_vport_context_out, out,

sys/dev/mlx5/mlx5_core/mlx5_wq.c

106

wq->log_stride = 6 + MLX5_GET(cqc, cqc, cqe_sz);

sys/dev/mlx5/mlx5_core/mlx5_wq.c

107

wq->log_sz = MLX5_GET(cqc, cqc, log_cq_size);

sys/dev/mlx5/mlx5_core/mlx5_wq.c

145

wq->log_stride = MLX5_GET(wq, wqc, log_wq_stride);

sys/dev/mlx5/mlx5_core/mlx5_wq.c

146

wq->sz_m1 = (1 << MLX5_GET(wq, wqc, log_wq_sz)) - 1;

sys/dev/mlx5/mlx5_core/mlx5_wq.c

70

wq->log_stride = MLX5_GET(wq, wqc, log_wq_stride);

sys/dev/mlx5/mlx5_core/mlx5_wq.c

71

wq->sz_m1 = (1 << MLX5_GET(wq, wqc, log_wq_sz)) - 1;

sys/dev/mlx5/mlx5_en/mlx5_en_dim.c

41

switch (MLX5_GET(cqc, cqc, cq_period_mode)) {

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

391

MLX5_GET(pplm_reg, in, fec_override_admin_10g_40g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

393

MLX5_GET(pplm_reg, in, fec_override_admin_25g) &

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

394

MLX5_GET(pplm_reg, in, fec_override_admin_50g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

396

MLX5_GET(pplm_reg, in, fec_override_admin_56g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

398

MLX5_GET(pplm_reg, in, fec_override_admin_100g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

402

MLX5_GET(pplm_reg, in, fec_override_cap_10g_40g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

404

MLX5_GET(pplm_reg, in, fec_override_cap_25g) &

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

405

MLX5_GET(pplm_reg, in, fec_override_cap_50g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

407

MLX5_GET(pplm_reg, in, fec_override_cap_56g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

409

MLX5_GET(pplm_reg, in, fec_override_cap_100g);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

413

MLX5_GET(pplm_reg, in, fec_override_admin_50g_1x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

415

MLX5_GET(pplm_reg, in, fec_override_admin_100g_2x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

417

MLX5_GET(pplm_reg, in, fec_override_admin_200g_4x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

419

MLX5_GET(pplm_reg, in, fec_override_admin_400g_8x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

423

MLX5_GET(pplm_reg, in, fec_override_cap_50g_1x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

425

MLX5_GET(pplm_reg, in, fec_override_cap_100g_2x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

427

MLX5_GET(pplm_reg, in, fec_override_cap_200g_4x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

429

MLX5_GET(pplm_reg, in, fec_override_cap_400g_8x);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

433

MLX5_GET(pplm_reg, in, fec_mode_active);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

856

value = MLX5_GET(mtcap, out_cap, sensor_count);

sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c

878

(s16)MLX5_GET(mtmp_reg, out_sensor, temperature) * 125;

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c

348

MLX5_GET(sw_tls_cntx, ptag->crypto_params, key.key_len),

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c

1070

tracker_state_val = MLX5_GET(tls_progress_params, buffer,

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c

1072

auth_state_val = MLX5_GET(tls_progress_params, buffer, auth_state);

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c

307

switch (MLX5_GET(tls_progress_params, buffer, record_tracker_state)) {

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c

314

switch (MLX5_GET(tls_progress_params, buffer, auth_state)) {

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c

321

tcp_curr_sn_he = MLX5_GET(tls_progress_params, buffer, hw_resync_tcp_sn);

sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c

577

MLX5_GET(sw_tls_rx_cntx, ptag->crypto_params, key.key_len),

sys/dev/mlx5/mlx5_en/mlx5_en_main.c

1269

switch (MLX5_GET(cqc, cqc, cq_period_mode)) {

sys/dev/mlx5/mlx5_en/mlx5_en_main.c

406

connector_type = MLX5_GET(ptys_reg, out, connector_type);

sys/dev/mlx5/mlx5_en/mlx5_en_main.c

624

s_debug->c = MLX5_GET(mpcnt_reg, out, counter_set.f.c);

sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c

55

MLX5_GET(bufferx_reg, buffer, lossy);

sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c

57

MLX5_GET(bufferx_reg, buffer, epsb);

sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c

59

MLX5_GET(bufferx_reg, buffer, size) << MLX5E_BUFFER_CELL_SHIFT;

sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c

61

MLX5_GET(bufferx_reg, buffer, xon_threshold) << MLX5E_BUFFER_CELL_SHIFT;

sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c

63

MLX5_GET(bufferx_reg, buffer, xoff_threshold) << MLX5E_BUFFER_CELL_SHIFT;

sys/dev/mlx5/mlx5_en/mlx5_en_port_buffer.c

75

MLX5_GET(pbmc_reg, out, port_buffer_size) << MLX5E_BUFFER_CELL_SHIFT;

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

180

sq->queue_handle = MLX5_GET(query_sq_out, out, sq_context.queue_handle);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

160

query->image_status = MLX5_GET(fpga_ctrl, out, status);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

161

query->admin_image = MLX5_GET(fpga_ctrl, out, flash_select_admin);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

162

query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

180

status = MLX5_GET(fpga_ctrl, out, status);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

210

temp->index = MLX5_GET(mtmp_reg, out, sensor_index);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

211

temp->temperature = MLX5_GET(mtmp_reg, out, temperature);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

212

temp->mte = MLX5_GET(mtmp_reg, out, mte);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

213

temp->max_temperature = MLX5_GET(mtmp_reg, out, max_temperature);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

214

temp->tee = MLX5_GET(mtmp_reg, out, tee);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

215

temp->temperature_threshold_hi = MLX5_GET(mtmp_reg, out,

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

217

temp->temperature_threshold_lo = MLX5_GET(mtmp_reg, out,

sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c

242

*fpga_qpn = MLX5_GET(fpga_create_qp_out, out, fpga_qpn);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c

726

MLX5_GET(fpga_qpc, conn->fpga_qpc, next_send_psn));

sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c

772

MLX5_GET(fpga_qpc, conn->fpga_qpc, next_rcv_psn));

sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c

463

syndrome = MLX5_GET(fpga_error_event, data, syndrome);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c

467

syndrome = MLX5_GET(fpga_qp_error_event, data, syndrome);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c

469

fpga_qpn = MLX5_GET(fpga_qp_error_event, data, fpga_qpn);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c

249

if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, esp))

sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c

252

if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, ipv6))

sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c

255

if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, lso))

sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c

268

return MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps,

sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c

285

addr = (u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps,

sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c

287

((u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps,

sys/dev/mlx5/mlx5_fpga/mlx5fpga_trans.c

261

tid = MLX5_GET(fpga_shell_qp_packet, buf->sg[0].data, tid);

sys/dev/mlx5/mlx5_fpga/mlx5fpga_trans.c

266

type = MLX5_GET(fpga_shell_qp_packet, buf->sg[0].data, type);