Symbol: MLX5_CQE_OWNER_MASK
sys/dev/mlx5/mlx5_core/wq.h
144
u8 cqe_ownership_bit = cqe->op_own & MLX5_CQE_OWNER_MASK;
sys/dev/mlx5/mlx5_en/mlx5_en_txrx.c
40
if ((cqe->op_own ^ mlx5_cqwq_get_wrap_cnt(&cq->wq)) & MLX5_CQE_OWNER_MASK)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
451
cqe->op_own = MLX5_CQE_INVALID << 4 | MLX5_CQE_OWNER_MASK;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1068
owner_bit = dest64->op_own & MLX5_CQE_OWNER_MASK;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1071
(dest64->op_own & ~MLX5_CQE_OWNER_MASK);
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1219
dcqe64->op_own = (dcqe64->op_own & ~MLX5_CQE_OWNER_MASK) | sw_own;
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
87
!((cqe64->op_own & MLX5_CQE_OWNER_MASK) ^ !!(n & (cq->ibcq.cqe + 1)))) {