Symbol: MLX5_CAP_GEN
sys/dev/mlx5/driver.h
1276
return !MLX5_CAP_GEN(dev, rq_ts_format) ?
sys/dev/mlx5/driver.h
1283
return !MLX5_CAP_GEN(dev, sq_ts_format) ?
sys/dev/mlx5/mlx5_accel/mlx5_ipsec.c
763
MLX5_CAP_GEN(mdev, ipsec_offload) != 0,
sys/dev/mlx5/mlx5_accel/mlx5_ipsec.c
764
MLX5_CAP_GEN(mdev, log_max_dek) != 0,
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
42
if (!MLX5_CAP_GEN(mdev, ipsec_offload))
sys/dev/mlx5/mlx5_accel/mlx5_ipsec_offload.c
45
if (!MLX5_CAP_GEN(mdev, log_max_dek))
sys/dev/mlx5/mlx5_core/diag_cnt.h
33
(MLX5_CAP_GEN(mdev, debug) && \
sys/dev/mlx5/mlx5_core/diag_cnt.h
34
MLX5_CAP_GEN(mdev, num_of_diagnostic_counters))
sys/dev/mlx5/mlx5_core/eswitch.h
32
#define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_flow_table)
sys/dev/mlx5/mlx5_core/eswitch.h
35
(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
sys/dev/mlx5/mlx5_core/eswitch.h
38
(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
278
MLX5_CAP_GEN(dev, num_of_diagnostic_counters));
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
282
for (i = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++)
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
297
u32 num_counters = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
320
for (i = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++)
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
330
for (i = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++) {
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
340
if (i == MLX5_CAP_GEN(dev, num_of_diagnostic_counters))
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
403
for (i = j = 0; i != MLX5_CAP_GEN(dev, num_of_diagnostic_counters); i++) {
sys/dev/mlx5/mlx5_core/mlx5_diag_cnt.c
47
max = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
100
numcounters = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
178
if (MLX5_CAP_GEN(dev, debug) == 0)
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
181
numcounters = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
276
if (MLX5_CAP_GEN(dev, debug) == 0)
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
283
numcounters = MLX5_CAP_GEN(dev, num_of_diagnostic_counters);
sys/dev/mlx5/mlx5_core/mlx5_diagnostics.c
97
if (MLX5_CAP_GEN(dev, debug) == 0)
sys/dev/mlx5/mlx5_core/mlx5_eq.c
557
if (MLX5_CAP_GEN(dev, port_module_event))
sys/dev/mlx5/mlx5_core/mlx5_eq.c
561
if (MLX5_CAP_GEN(dev, nic_vport_change_event))
sys/dev/mlx5/mlx5_core/mlx5_eq.c
565
if (MLX5_CAP_GEN(dev, dcbx))
sys/dev/mlx5/mlx5_core/mlx5_eq.c
569
if (MLX5_CAP_GEN(dev, fpga))
sys/dev/mlx5/mlx5_core/mlx5_eq.c
573
if (MLX5_CAP_GEN(dev, temp_warn_event))
sys/dev/mlx5/mlx5_core/mlx5_eq.c
576
if (MLX5_CAP_GEN(dev, general_notification_event)) {
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1001
if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1037
if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1038
MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1055
int l2_table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table);
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1060
if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1061
MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1126
if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1127
MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
1160
(esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
997
if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager) ||
sys/dev/mlx5/mlx5_core/mlx5_eswitch.c
998
MLX5_CAP_GEN(esw->dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
sys/dev/mlx5/mlx5_core/mlx5_fs_cmd.c
170
if ((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) &&
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3173
if ((((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH) &&
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3174
(MLX5_CAP_GEN(dev, nic_flow_table))) ||
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3175
((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) &&
sys/dev/mlx5/mlx5_core/mlx5_fs_core.c
3176
MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) &&
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
145
(1 << MLX5_CAP_GEN(dev, log_max_flow_counter_bulk)));
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
151
(1 << MLX5_CAP_GEN(dev, log_max_flow_counter_bulk)));
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
333
if (aging && MLX5_CAP_GEN(dev, flow_counter_bulk_alloc) != 0) {
sys/dev/mlx5/mlx5_core/mlx5_fs_counters.c
552
alloc_bitmask = MLX5_CAP_GEN(dev, flow_counter_bulk_alloc);
sys/dev/mlx5/mlx5_core/mlx5_fw.c
143
if (MLX5_CAP_GEN(dev, eth_net_offloads)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
149
if (MLX5_CAP_GEN(dev, pg)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
155
if (MLX5_CAP_GEN(dev, atomic)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
161
if (MLX5_CAP_GEN(dev, roce)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
167
if ((MLX5_CAP_GEN(dev, port_type) ==
sys/dev/mlx5/mlx5_core/mlx5_fw.c
169
MLX5_CAP_GEN(dev, nic_flow_table)) ||
sys/dev/mlx5/mlx5_core/mlx5_fw.c
170
(MLX5_CAP_GEN(dev, port_type) == MLX5_CMD_HCA_CAP_PORT_TYPE_IB &&
sys/dev/mlx5/mlx5_core/mlx5_fw.c
171
MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
177
if (MLX5_CAP_GEN(dev, eswitch_flow_table)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
183
if (MLX5_CAP_GEN(dev, vport_group_manager)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
189
if (MLX5_CAP_GEN(dev, snapshot)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
195
if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
201
if (MLX5_CAP_GEN(dev, debug)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
207
if (MLX5_CAP_GEN(dev, qos)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
213
if (MLX5_CAP_GEN(dev, qcam_reg)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
219
if (MLX5_CAP_GEN(dev, mcam_reg)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
225
if (MLX5_CAP_GEN(dev, pcam_reg)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
231
if (MLX5_CAP_GEN(dev, tls_tx)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
237
if (MLX5_CAP_GEN(dev, event_cap)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
243
if (MLX5_CAP_GEN(dev, ipsec_offload)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
285
if (!MLX5_CAP_GEN(dev, force_teardown)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
315
if (!MLX5_CAP_GEN(dev, fast_teardown)) {
sys/dev/mlx5/mlx5_core/mlx5_fw.c
626
if (!MLX5_CAP_GEN(dev, mcam_reg) ||
sys/dev/mlx5/mlx5_core/mlx5_health.c
553
if (!MLX5_CAP_GEN(dev, mcam_reg) ||
sys/dev/mlx5/mlx5_core/mlx5_main.c
1718
if (MLX5_CAP_GEN(dev, vport_group_manager)) {
sys/dev/mlx5/mlx5_core/mlx5_main.c
2040
fast_teardown = MLX5_CAP_GEN(dev, fast_teardown);
sys/dev/mlx5/mlx5_core/mlx5_main.c
2041
force_teardown = MLX5_CAP_GEN(dev, force_teardown);
sys/dev/mlx5/mlx5_core/mlx5_main.c
218
if (!MLX5_CAP_GEN(dev, driver_version))
sys/dev/mlx5/mlx5_core/mlx5_main.c
339
int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq);
sys/dev/mlx5/mlx5_core/mlx5_main.c
347
nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus();
sys/dev/mlx5/mlx5_core/mlx5_main.c
499
mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)),
sys/dev/mlx5/mlx5_core/mlx5_main.c
538
if (MLX5_CAP_GEN(dev, atomic)) {
sys/dev/mlx5/mlx5_core/mlx5_main.c
590
if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH &&
sys/dev/mlx5/mlx5_core/mlx5_main.c
591
!MLX5_CAP_GEN(dev, roce))
sys/dev/mlx5/mlx5_core/mlx5_main.c
607
if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH)
sys/dev/mlx5/mlx5_core/mlx5_main.c
989
if (MLX5_CAP_GEN(dev, eswitch_flow_table))
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
46
const u32 l2table_size = MIN(1U << MLX5_CAP_GEN(dev, log_max_l2_table),
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
54
if (!MLX5_CAP_GEN(dev, eswitch_flow_table)) {
sys/dev/mlx5/mlx5_core/mlx5_mpfs.c
94
if (!MLX5_CAP_GEN(dev, eswitch_flow_table)) {
sys/dev/mlx5/mlx5_core/mlx5_mr.c
75
if (MLX5_CAP_GEN(dev, relaxed_ordering_write))
sys/dev/mlx5/mlx5_core/mlx5_port.c
456
if (MLX5_CAP_GEN(dev, wol_s))
sys/dev/mlx5/mlx5_core/mlx5_port.c
458
if (MLX5_CAP_GEN(dev, wol_g))
sys/dev/mlx5/mlx5_core/mlx5_port.c
460
if (MLX5_CAP_GEN(dev, wol_a))
sys/dev/mlx5/mlx5_core/mlx5_port.c
462
if (MLX5_CAP_GEN(dev, wol_b))
sys/dev/mlx5/mlx5_core/mlx5_port.c
464
if (MLX5_CAP_GEN(dev, wol_m))
sys/dev/mlx5/mlx5_core/mlx5_port.c
466
if (MLX5_CAP_GEN(dev, wol_u))
sys/dev/mlx5/mlx5_core/mlx5_port.c
468
if (MLX5_CAP_GEN(dev, wol_p))
sys/dev/mlx5/mlx5_core/mlx5_port.c
844
if (!MLX5_CAP_GEN(mdev, ets))
sys/dev/mlx5/mlx5_core/mlx5_port.c
854
u8 num_tc = MLX5_CAP_GEN(mdev, max_tc) ? : 8;
sys/dev/mlx5/mlx5_core/mlx5_port.c
865
if (!MLX5_CAP_GEN(mdev, ets))
sys/dev/mlx5/mlx5_core/mlx5_rl.c
196
if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, packet_pacing)) {
sys/dev/mlx5/mlx5_core/mlx5_uar.c
198
(1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET;
sys/dev/mlx5/mlx5_core/mlx5_uar.c
278
bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size);
sys/dev/mlx5/mlx5_core/mlx5_uar.c
62
if (MLX5_CAP_GEN(mdev, uar_4k))
sys/dev/mlx5/mlx5_core/mlx5_uar.c
63
return MLX5_CAP_GEN(mdev, num_of_uars_per_page);
sys/dev/mlx5/mlx5_core/mlx5_uar.c
72
if (MLX5_CAP_GEN(mdev, uar_4k))
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1014
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1032
if (MLX5_CAP_GEN(dev, num_ports) == 2)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1049
is_group_manager = MLX5_CAP_GEN(mdev, vport_group_manager);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1065
if (MLX5_CAP_GEN(mdev, num_ports) == 2)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1154
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1155
tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1189
if (MLX5_CAP_GEN(dev, num_ports) == 2)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
122
return (MLX5_CAP_GEN(mdev, max_qp_cnt) -
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1222
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1224
tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1252
if (MLX5_CAP_GEN(dev, num_ports) == 2)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1438
switch (MLX5_CAP_GEN(dev, port_type)) {
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1517
if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) &&
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1518
!MLX5_CAP_GEN(mdev, disable_local_lb_uc))
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1530
if (MLX5_CAP_GEN(mdev, disable_local_lb_mc))
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1534
if (MLX5_CAP_GEN(mdev, disable_local_lb_uc))
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1624
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1642
if (MLX5_CAP_GEN(dev, num_ports) == 2)
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1749
switch (MLX5_CAP_GEN(dev, port_type)) {
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1766
switch (MLX5_CAP_GEN(dev, port_type)) {
sys/dev/mlx5/mlx5_core/mlx5_vport.c
1781
switch (MLX5_CAP_GEN(dev, port_type)) {
sys/dev/mlx5/mlx5_core/mlx5_vport.c
518
if (!MLX5_CAP_GEN(mdev, vport_group_manager))
sys/dev/mlx5/mlx5_core/mlx5_vport.c
557
if (!MLX5_CAP_GEN(mdev, vport_group_manager))
sys/dev/mlx5/mlx5_core/mlx5_vport.c
789
1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
sys/dev/mlx5/mlx5_core/mlx5_vport.c
790
1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
843
max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
sys/dev/mlx5/mlx5_core/mlx5_vport.c
900
max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1154
MLX5_CAP_GEN(priv->mdev, cqe_compression)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1225
if (MLX5_CAP_GEN(priv->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1233
if (MLX5_CAP_GEN(priv->mdev, disable_local_lb_mc)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1243
if (MLX5_CAP_GEN(priv->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1251
if (MLX5_CAP_GEN(priv->mdev, disable_local_lb_uc)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1452
if (MLX5_CAP_GEN(priv->mdev, disable_local_lb_mc) ||
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
1453
MLX5_CAP_GEN(priv->mdev, disable_local_lb_uc)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
173
if (MLX5_CAP_GEN(mdev, qcam_reg) == 0 ||
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
317
if (!MLX5_CAP_GEN(priv->mdev, ets)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
377
if (!MLX5_CAP_GEN(mdev, pcam_reg))
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
462
if (!MLX5_CAP_GEN(mdev, pcam_reg)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
567
if (!MLX5_CAP_GEN(mdev, pcam_reg)) {
sys/dev/mlx5/mlx5_en/mlx5_en_ethtool.c
915
mode_modify = MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify);
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1077
1 << MLX5_CAP_GEN(priv->mdev, log_max_current_uc_list) :
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
1078
1 << MLX5_CAP_GEN(priv->mdev, log_max_current_mc_list);
sys/dev/mlx5/mlx5_en/mlx5_en_flow_table.c
627
max_list_size = 1 << MLX5_CAP_GEN(priv->mdev, log_max_vlan_list);
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
227
if (MLX5_CAP_GEN(priv->mdev, tls_tx) == 0 ||
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
228
MLX5_CAP_GEN(priv->mdev, log_max_dek) == 0)
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
250
max_dek = 1U << (MLX5_CAP_GEN(priv->mdev, log_max_dek) - 1);
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls.c
251
max_tis = 1U << (MLX5_CAP_GEN(priv->mdev, log_max_tis) - 1);
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
481
if (MLX5_CAP_GEN(priv->mdev, tls_rx) == 0 ||
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
482
MLX5_CAP_GEN(priv->mdev, log_max_dek) == 0 ||
sys/dev/mlx5/mlx5_en/mlx5_en_hw_tls_rx.c
501
ptls->max_resources = 1U << (MLX5_CAP_GEN(priv->mdev, log_max_dek) - 1);
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2426
if (MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe))
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2441
if (MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe))
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2470
if (MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe))
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2558
if (MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify)) {
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
2586
if (MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify)) {
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3442
if (MLX5_CAP_GEN(mdev, qos) &&
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3453
if (MLX5_CAP_GEN(mdev, tls_tx) != 0 &&
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3454
MLX5_CAP_GEN(mdev, log_max_dek) != 0)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3464
if (MLX5_CAP_GEN(mdev, tls_rx) != 0 &&
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3465
MLX5_CAP_GEN(mdev, log_max_dek) != 0 &&
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3875
if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3887
((1U << MLX5_CAP_GEN(mdev, log_bf_reg_size)) / 2U) -
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3915
MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3919
MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? 1 : 0;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3976
bool ro_write = MLX5_CAP_GEN(mdev, relaxed_ordering_write);
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
3977
bool ro_read = MLX5_CAP_GEN(mdev, relaxed_ordering_read);
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
4712
if (MLX5_CAP_GEN(priv->mdev, vport_group_manager) == 0 &&
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
4889
priv->cclk = (uint64_t)MLX5_CAP_GEN(mdev, device_frequency_khz) * 1000ULL;
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
740
if (MLX5_CAP_GEN(mdev, pcam_reg) &&
sys/dev/mlx5/mlx5_en/mlx5_en_main.c
780
if (!MLX5_CAP_GEN(priv->mdev, nic_receive_steering_discard))
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
1071
if (!MLX5_CAP_GEN(priv->mdev, qos) || !MLX5_CAP_QOS(priv->mdev, packet_pacing))
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
1215
if (!MLX5_CAP_GEN(priv->mdev, qos) ||
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
1334
if (MLX5_CAP_GEN(rl->priv->mdev, cq_period_mode_modify)) {
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
1472
mode_modify = MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify);
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
85
if (MLX5_CAP_GEN(rl->priv->mdev, cq_period_start_from_cqe))
sys/dev/mlx5/mlx5_en/mlx5_en_rl.c
860
if (!MLX5_CAP_GEN(priv->mdev, qos) || !MLX5_CAP_QOS(priv->mdev, packet_pacing))
sys/dev/mlx5/mlx5_en/port_buffer.h
36
#define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
589
if (MLX5_CAP_GEN(mdev, cqe_version) == 1)
sys/dev/mlx5/mlx5_fpga/mlx5fpga_conn.c
723
MLX5_SET(qpc, qpc, log_msg_max, (u8)MLX5_CAP_GEN(mdev, log_max_msg));
sys/dev/mlx5/mlx5_fpga/mlx5fpga_core.c
335
if (!MLX5_CAP_GEN(mdev, fpga)) {
sys/dev/mlx5/mlx5_fpga/mlx5fpga_ipsec.c
80
if (!mdev->fpga || !MLX5_CAP_GEN(mdev, fpga))
sys/dev/mlx5/mlx5_ib/mlx5_ib.h
1190
return lib_support && MLX5_CAP_GEN(dev->mdev, uar_4k) ?
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
341
if (!MLX5_CAP_GEN(dev->mdev, cc_modify_allowed))
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
396
if (!MLX5_CAP_GEN(dev->mdev, cc_modify_allowed))
sys/dev/mlx5/mlx5_ib/mlx5_ib_cong.c
488
if (!MLX5_CAP_GEN(dev->mdev, cc_query_allowed))
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1101
if (!MLX5_CAP_GEN(dev->mdev, cq_moderation))
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1253
if (!MLX5_CAP_GEN(dev->mdev, cq_resize)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1259
entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1262
1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz));
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
1267
if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)) + 1)
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
935
(entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))))
sys/dev/mlx5/mlx5_ib/mlx5_ib_cq.c
942
if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
169
if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
174
(MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
177
(MLX5_CAP_GEN(dev->mdev, uctx_cap) &
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
1867
if (MLX5_CAP_GEN(dev, event_cap)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2238
if (!MLX5_CAP_GEN(dev, event_cap))
sys/dev/mlx5/mlx5_ib/mlx5_ib_devx.c
2909
return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
sys/dev/mlx5/mlx5_ib/mlx5_ib_gsi.c
65
return MLX5_CAP_GEN(dev->mdev, set_deth_sqpn);
sys/dev/mlx5/mlx5_ib/mlx5_ib_mad.c
249
if (MLX5_CAP_GEN(mdev, vport_counters) &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_mad.c
503
if (port < 1 || port > MLX5_CAP_GEN(mdev, num_ports)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_mad.c
533
props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1159
MLX5_CAP_GEN(dev->mdev, uar_4k) ? "yes" : "no",
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1213
if (!MLX5_CAP_GEN(dev->mdev, log_max_transport_domain))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1220
if ((MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) ||
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1221
(!MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1222
!MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1241
if (!MLX5_CAP_GEN(dev->mdev, log_max_transport_domain))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1246
if ((MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) ||
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1247
(!MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1248
!MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1301
resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1302
if (mlx5_core_is_pf(dev->mdev) && MLX5_CAP_GEN(dev->mdev, bf))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1303
resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1305
resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1306
resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1307
resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1308
resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1309
resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1311
(__u8)MLX5_CAP_GEN(dev->mdev, cqe_version),
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1313
resp.log_uar_size = MLX5_CAP_GEN(dev->mdev, uar_4k) ?
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1315
resp.num_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ?
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1316
MLX5_CAP_GEN(dev->mdev, num_of_uars_per_page) : 1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1372
resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
1463
fw_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_UARS_IN_PAGE : 1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2728
for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
2754
for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3105
if ((ll == IB_LINK_LAYER_INFINIBAND) || MLX5_CAP_GEN(dev->mdev, roce))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3177
if (MLX5_CAP_GEN(dev->mdev, roce)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3190
if (MLX5_CAP_GEN(dev->mdev, roce))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3201
if (MLX5_CAP_GEN(dev->mdev, roce))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
323
props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3357
port_type_cap = MLX5_CAP_GEN(mdev, port_type);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3366
dev->port = kcalloc(MLX5_CAP_GEN(mdev, num_ports), sizeof(*dev->port),
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3388
dev->num_ports = MLX5_CAP_GEN(mdev, num_ports);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3487
if (MLX5_CAP_GEN(mdev, imaicl)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3495
if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt) &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3496
MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
3501
if (MLX5_CAP_GEN(mdev, xrc)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
476
if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB)
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
477
return !MLX5_CAP_GEN(dev->mdev, ib_virt);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
565
*max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev,
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
648
u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
685
if (MLX5_CAP_GEN(mdev, pkv))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
687
if (MLX5_CAP_GEN(mdev, qkv))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
689
if (MLX5_CAP_GEN(mdev, apm))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
691
if (MLX5_CAP_GEN(mdev, xrc))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
693
if (MLX5_CAP_GEN(mdev, imaicl)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
696
props->max_mw = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
701
if (MLX5_CAP_GEN(mdev, sho)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
710
if (MLX5_CAP_GEN(mdev, block_lb_mc))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
713
if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
748
if (MLX5_CAP_GEN(mdev, ipoib_ipoib_offloads)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
753
if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
765
props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
766
props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
767
max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) /
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
769
max_sq_desc = min_t(int, MLX5_CAP_GEN(mdev, max_wqe_sz_sq), 512);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
775
props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
776
props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
777
props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
778
props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
779
props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
780
props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
781
props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
782
props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
783
props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
787
1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
790
props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
791
props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
795
props->hca_core_clock = MLX5_CAP_GEN(mdev, device_frequency_khz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
799
if (MLX5_CAP_GEN(mdev, pg))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
804
if (MLX5_CAP_GEN(mdev, cd))
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
813
1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
815
1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt_size);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
818
1 << MLX5_CAP_GEN(dev->mdev, log_max_rq);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
83
int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
948
props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size));
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
949
props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c
950
props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size));
sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
882
bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1562
u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1624
if (!MLX5_CAP_GEN(mdev, block_lb_mc)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1636
if (!MLX5_CAP_GEN(mdev, cd)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1650
if (!MLX5_CAP_GEN(mdev, ipoib_ipoib_offloads)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1660
if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) ||
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1699
1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
1831
if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2129
if (!MLX5_CAP_GEN(dev->mdev, xrc)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2263
MLX5_CAP_GEN(dev->mdev, stat_rate_support)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
241
if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2563
if (MLX5_CAP_GEN(dev->mdev, modify_rq_counters_set_id)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
263
if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
266
MLX5_CAP_GEN(dev->mdev,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2772
(u8)MLX5_CAP_GEN(dev->mdev, log_max_msg);
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
2990
attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports))) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3008
(1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3016
(1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
388
if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
390
wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
403
if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
406
1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
429
if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
431
desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4340
ib_ah_attr->port_num > MLX5_CAP_GEN(dev, num_ports))
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
443
if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
446
1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4638
if (!MLX5_CAP_GEN(dev->mdev, xrc))
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4739
if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz)))
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4898
MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4901
MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
948
qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2;
sys/dev/mlx5/mlx5_ib/mlx5_ib_srq.c
141
if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_srq.c
201
if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 &&
sys/dev/mlx5/mlx5_ib/mlx5_ib_srq.c
248
__u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz);
sys/dev/mlx5/mlx5_lib/mlx5_aso.c
131
if (MLX5_CAP_GEN(mdev, cqe_128_always) && cache_line_size() >= 128)
sys/dev/mlx5/mlx5_lib/mlx5_gid.c
135
if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)