MLX5_ADAPTER_PAGE_SIZE
MLX5_UARS_IN_PAGE = PAGE_SIZE / MLX5_ADAPTER_PAGE_SIZE,
(MLX5_ADAPTER_PAGE_SIZE / MLX5_CMD_MBOX_SIZE)
CTASSERT(MLX5_CMD_MBOX_SIZE <= MLX5_ADAPTER_PAGE_SIZE);
MLX5_DB_PER_PAGE = MLX5_ADAPTER_PAGE_SIZE / L1_CACHE_BYTES,
memset(pgdir->db_page, 0, MLX5_ADAPTER_PAGE_SIZE);
memset(block, 0, MLX5_ADAPTER_PAGE_SIZE -
MLX5_ADAPTER_PAGE_SIZE, /* alignment */
MLX5_ADAPTER_PAGE_SIZE, /* maxsize */
MLX5_ADAPTER_PAGE_SIZE, /* maxsegsize */
memset(cmd->cmd_buf, 0, MLX5_ADAPTER_PAGE_SIZE);
(long long)(dev->priv.fw_pages * MLX5_ADAPTER_PAGE_SIZE));
MLX5_ADAPTER_PAGE_SIZE, &mlx5_fwp_load_mem_cb,
size_t index = (offset / MLX5_ADAPTER_PAGE_SIZE);
return ((fwp + index)->dma_addr + (offset % MLX5_ADAPTER_PAGE_SIZE));
size_t index = (offset / MLX5_ADAPTER_PAGE_SIZE);
return ((char *)(fwp + index)->virt_addr + (offset % MLX5_ADAPTER_PAGE_SIZE));
return dbi / MLX5_BFREGS_PER_UAR * MLX5_ADAPTER_PAGE_SIZE +
bfreg_idx = (((uintptr_t)bfreg->map % MLX5_ADAPTER_PAGE_SIZE) - MLX5_BF_OFFSET) / bf_reg_size;
return ((u64)1 << mr->order) * MLX5_ADAPTER_PAGE_SIZE >=
length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1));