sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1474

switch (MLX5E_RL_PARAMS_INDEX(arg[arg2])) {

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1475

case MLX5E_RL_PARAMS_INDEX(tx_worker_threads_def):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1485

case MLX5E_RL_PARAMS_INDEX(tx_channels_per_worker_def):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1495

case MLX5E_RL_PARAMS_INDEX(tx_rates_def):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1505

case MLX5E_RL_PARAMS_INDEX(tx_coalesce_usecs):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1520

case MLX5E_RL_PARAMS_INDEX(tx_coalesce_pkts):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1535

case MLX5E_RL_PARAMS_INDEX(tx_coalesce_mode):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1556

case MLX5E_RL_PARAMS_INDEX(tx_queue_size):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1581

case MLX5E_RL_PARAMS_INDEX(tx_completion_fact):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1597

case MLX5E_RL_PARAMS_INDEX(tx_limit_add):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1601

case MLX5E_RL_PARAMS_INDEX(tx_limit_clr):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1605

case MLX5E_RL_PARAMS_INDEX(tx_allowed_deviation):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

1617

case MLX5E_RL_PARAMS_INDEX(tx_burst_size):

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

889

MLX5E_RL_PARAMS_INDEX(arg[i]),

sys/dev/mlx5/mlx5_en/mlx5_en_rl.c

934

MLX5E_RL_PARAMS_INDEX(table_arg[i]),