sys/dev/age/if_age.c

1322

MII_BMCR, BMCR_PDOWN);

sys/dev/age/if_age.c

1364

MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/age/if_age.c

1422

MII_BMCR, BMCR_PDOWN);

sys/dev/age/if_age.c

404

age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR, BMCR_RESET);

sys/dev/age/if_age.c

423

age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR,

sys/dev/alc/if_alc.c

1125

MII_BMCR, BMCR_ISO | BMCR_PDOWN);

sys/dev/alc/if_alc.c

2480

MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/ale/if_ale.c

1427

MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/axgbe/xgbe-phy-v2.c

1151

ret = xgbe_phy_i2c_mii_read(pdata, MII_BMCR);

sys/dev/axgbe/xgbe-phy-v2.c

3054

int bmcr = xgbe_phy_mii_read(pdata, pdata->mdio_addr, MII_BMCR);

sys/dev/bce/if_bce.c

1837

if (reg >= MII_BMCR && reg <= MII_ANLPRNP)

sys/dev/bce/if_bce.c

1917

if (reg >= MII_BMCR && reg <= MII_ANLPRNP)

sys/dev/bge/if_bge.c

3862

sc->bge_phy_addr, MII_BMCR, BMCR_RESET);

sys/dev/cas/if_cas.c

2148

case MII_BMCR:

sys/dev/cas/if_cas.c

2209

case MII_BMCR:

sys/dev/cxgb/common/cxgb_ael1002.c

240

err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,

sys/dev/cxgb/common/cxgb_ael1002.c

386

err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, 1, 1);

sys/dev/cxgb/common/cxgb_ael1002.c

392

err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, 1, 0);

sys/dev/cxgb/common/cxgb_aq100x.c

231

err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, BMCR_PDOWN,

sys/dev/cxgb/common/cxgb_aq100x.c

238

err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMCR, &v);

sys/dev/cxgb/common/cxgb_aq100x.c

261

err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR,

sys/dev/cxgb/common/cxgb_aq100x.c

317

return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,

sys/dev/cxgb/common/cxgb_aq100x.c

338

err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR,

sys/dev/cxgb/common/cxgb_aq100x.c

343

err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,

sys/dev/cxgb/common/cxgb_aq100x.c

364

err = mdio_read(phy, MDIO_DEV_ANEG, MII_BMCR, &v);

sys/dev/cxgb/common/cxgb_aq100x.c

420

err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMCR, &v);

sys/dev/cxgb/common/cxgb_aq100x.c

490

err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMCR, &v);

sys/dev/cxgb/common/cxgb_aq100x.c

518

(void) mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMCR, &v);

sys/dev/cxgb/common/cxgb_mv88e1xxx.c

171

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,

sys/dev/cxgb/common/cxgb_mv88e1xxx.c

177

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,

sys/dev/cxgb/common/cxgb_mv88e1xxx.c

183

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_LOOPBACK,

sys/dev/cxgb/common/cxgb_mv88e1xxx.c

243

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,

sys/dev/cxgb/common/cxgb_t3_hw.c

398

err = t3_mdio_change_bits(phy, mmd, MII_BMCR, BMCR_PDOWN, BMCR_RESET);

sys/dev/cxgb/common/cxgb_t3_hw.c

403

err = mdio_read(phy, mmd, MII_BMCR, &ctl);

sys/dev/cxgb/common/cxgb_t3_hw.c

494

err = mdio_read(phy, 0, MII_BMCR, &ctl);

sys/dev/cxgb/common/cxgb_t3_hw.c

512

return mdio_write(phy, 0, MII_BMCR, ctl);

sys/dev/cxgb/common/cxgb_tn1010.c

105

err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0,

sys/dev/cxgb/common/cxgb_tn1010.c

84

return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,

sys/dev/cxgb/common/cxgb_tn1010.c

94

err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0,

sys/dev/cxgb/common/cxgb_vsc8211.c

121

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,

sys/dev/cxgb/common/cxgb_vsc8211.c

127

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE,

sys/dev/cxgb/common/cxgb_vsc8211.c

137

err = mdio_read(cphy, 0, MII_BMCR, &bmcr);

sys/dev/cxgb/common/cxgb_vsc8211.c

210

err = mdio_read(cphy, 0, MII_BMCR, &bmcr);

sys/dev/cxgb/common/cxgb_vsc8211.c

299

return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,

sys/dev/dc/if_dc.c

716

case MII_BMCR:

sys/dev/dc/if_dc.c

790

case MII_BMCR:

sys/dev/etherswitch/micrel/ksz8995ma.c

825

if (reg == MII_BMCR) {

sys/dev/fxp/inphy.c

157

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/gem/if_gem.c

1845

case MII_BMCR:

sys/dev/gem/if_gem.c

1906

case MII_BMCR:

sys/dev/jme/if_jme.c

1525

jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR,

sys/dev/jme/if_jme.c

3337

jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, BMCR_PDOWN);

sys/dev/jme/if_jme.c

3355

bmcr = jme_miibus_readreg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR);

sys/dev/jme/if_jme.c

3357

jme_miibus_writereg(sc->jme_dev, sc->jme_phyaddr, MII_BMCR, bmcr);

sys/dev/mii/acphy.c

168

reg = PHY_READ(sc, MII_BMCR);

sys/dev/mii/acphy.c

170

PHY_WRITE(sc, MII_BMCR, reg & ~(BMCR_ISO | BMCR_PDOWN));

sys/dev/mii/acphy.c

205

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/amphy.c

152

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/atphy.c

134

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/atphy.c

143

PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);

sys/dev/mii/atphy.c

165

PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |

sys/dev/mii/atphy.c

221

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/atphy.c

298

if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)

sys/dev/mii/atphy.c

362

PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/mii/axphy.c

144

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/bmtphy.c

195

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/ciphy.c

173

PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);

sys/dev/mii/dp83867phy.c

241

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/gentbi.c

224

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/icsphy.c

185

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/icsphy.c

237

PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_STARTNEG|BMCR_FDX);

sys/dev/mii/ip1000phy.c

349

PHY_WRITE(sc, MII_BMCR, reg);

sys/dev/mii/jmphy.c

173

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/jmphy.c

232

PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);

sys/dev/mii/jmphy.c

236

if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)

sys/dev/mii/jmphy.c

305

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/jmphy.c

317

PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);

sys/dev/mii/jmphy.c

339

PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/mii/lxtphy.c

208

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/mii.c

567

PHY_WRITE(child, MII_BMCR, PHY_READ(child, MII_BMCR) |

sys/dev/mii/mii_physubr.c

135

if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||

sys/dev/mii/mii_physubr.c

234

PHY_WRITE(sc, MII_BMCR, bmcr);

sys/dev/mii/mii_physubr.c

284

PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/mii/mii_physubr.c

341

PHY_WRITE(sc, MII_BMCR, reg);

sys/dev/mii/mii_physubr.c

345

reg = PHY_READ(sc, MII_BMCR);

sys/dev/mii/mii_physubr.c

357

if (PHY_READ(sc, MII_BMCR) != reg)

sys/dev/mii/mii_physubr.c

358

PHY_WRITE(sc, MII_BMCR, reg);

sys/dev/mii/mv88e151x.c

144

PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |

sys/dev/mii/mv88e151x.c

195

bmcr = PHY_READ(phy, MII_BMCR);

sys/dev/mii/nsgphy.c

194

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/nsphy.c

213

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/nsphy.c

285

PHY_WRITE(sc, MII_BMCR, reg);

sys/dev/mii/nsphy.c

305

reg = PHY_READ(sc, MII_BMCR);

sys/dev/mii/nsphy.c

314

PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);

sys/dev/mii/nsphyter.c

183

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/nsphyter.c

227

PHY_WRITE(sc, MII_BMCR, reg);

sys/dev/mii/nsphyter.c

249

reg = PHY_READ(sc, MII_BMCR);

sys/dev/mii/nsphyter.c

258

PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);

sys/dev/mii/qsphy.c

176

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/rdcphy.c

198

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/rgephy.c

223

PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);

sys/dev/mii/rlphy.c

174

bmcr = PHY_READ(phy, MII_BMCR);

sys/dev/mii/smcphy.c

153

reg = PHY_READ(sc, MII_BMCR);

sys/dev/mii/smcphy.c

155

PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);

sys/dev/mii/smcphy.c

188

PHY_WRITE(sc, MII_BMCR, BMCR_RESET);

sys/dev/mii/smcphy.c

192

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/smcphy.c

200

PHY_WRITE(sc, MII_BMCR, 0x3000);

sys/dev/mii/smcphy.c

217

PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/mii/smcphy.c

234

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/smscphy.c

140

reg = PHY_READ(sc, MII_BMCR);

sys/dev/mii/smscphy.c

142

PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);

sys/dev/mii/smscphy.c

180

PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/mii/smscphy.c

197

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/tdkphy.c

135

PHY_WRITE(sc, MII_BMCR, PHY_READ(sc, MII_BMCR) | BMCR_FDX);

sys/dev/mii/tdkphy.c

137

PHY_WRITE(sc, MII_BMCR, PHY_READ(sc, MII_BMCR) & ~BMCR_FDX);

sys/dev/mii/tdkphy.c

158

bmcr = PHY_READ(phy, MII_BMCR);

sys/dev/mii/truephy.c

184

bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;

sys/dev/mii/truephy.c

185

PHY_WRITE(sc, MII_BMCR, bmcr);

sys/dev/mii/truephy.c

186

PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);

sys/dev/mii/truephy.c

192

bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;

sys/dev/mii/truephy.c

193

PHY_WRITE(sc, MII_BMCR, bmcr);

sys/dev/mii/truephy.c

196

PHY_WRITE(sc, MII_BMCR,

sys/dev/mii/truephy.c

240

PHY_READ(sc, MII_BMCR);

sys/dev/mii/truephy.c

242

PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);

sys/dev/mii/truephy.c

256

PHY_READ(sc, MII_BMCR);

sys/dev/mii/truephy.c

258

PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);

sys/dev/mii/truephy.c

283

bmcr = PHY_READ(sc, MII_BMCR);

sys/dev/mii/ukphy_subr.c

72

bmcr = PHY_READ(phy, MII_BMCR);

sys/dev/nfe/if_nfe.c

3271

MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/nge/if_nge.c

422

case MII_BMCR:

sys/dev/nge/if_nge.c

471

case MII_BMCR:

sys/dev/re/if_re.c

3828

MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);

sys/dev/re/if_re.c

533

case MII_BMCR:

sys/dev/re/if_re.c

587

case MII_BMCR:

sys/dev/re/if_re.c

816

re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_RESET);

sys/dev/re/if_re.c

818

status = re_miibus_readreg(sc->rl_dev, phyaddr, MII_BMCR);

sys/dev/re/if_re.c

823

re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_LOOP);

sys/dev/rge/if_rge.c

1501

rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |

sys/dev/rge/if_rge_hw.c

175

rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN);

sys/dev/rge/if_rge_hw.c

183

rge_write_phy(sc, 0, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN);

sys/dev/rge/if_rge_hw.c

518

rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |

sys/dev/rge/if_rge_hw.c

521

if (!(rge_read_phy(sc, 0, MII_BMCR) & BMCR_RESET))

sys/dev/rl/if_rl.c

397

case MII_BMCR:

sys/dev/rl/if_rl.c

443

case MII_BMCR:

sys/dev/usb/net/if_muge.c

862

lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);

sys/dev/usb/net/if_muge.c

899

lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR,

sys/dev/usb/net/if_muge.c

906

MII_BMCR);

sys/dev/usb/net/if_muge.c

932

lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);

sys/dev/usb/net/if_muge.c

933

bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);

sys/dev/usb/net/if_rue.c

325

case MII_BMCR:

sys/dev/usb/net/if_rue.c

376

case MII_BMCR:

sys/dev/usb/net/if_smsc.c

1290

smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET);

sys/dev/usb/net/if_smsc.c

1295

bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);

sys/dev/usb/net/if_smsc.c

1315

bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR);

sys/dev/usb/net/if_smsc.c

1317

smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr);

sys/dev/usb/net/if_ure.c

1401

ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_BMCR,

sys/dev/usb/net/if_ure.c

1840

val = ure_ocp_reg_read(sc, URE_OCP_BASE_MII + MII_BMCR);

sys/dev/usb/net/if_ure.c

1843

ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_BMCR, val);

sys/dev/usb/net/ruephy.c

173

PHY_WRITE(sc, MII_BMCR, (BMCR_S100 | BMCR_AUTOEN | BMCR_FDX));

sys/dev/usb/net/ruephy.c

190

bmcr = PHY_READ(phy, MII_BMCR);

sys/dev/vge/if_vge.c

2789

vge_miibus_writereg(sc->vge_dev, sc->vge_phyaddr, MII_BMCR,

sys/dev/vge/if_vge.c

2832

vge_miibus_writereg(sc->vge_dev, sc->vge_phyaddr, MII_BMCR,

sys/dev/xilinx/if_xae.c

901

PHY_WR(sc, MII_BMCR,

sys/dev/xilinx/if_xae.c

903

} while (PHY1_RD(sc, MII_BMCR) == 0x0ffff);

sys/dev/xilinx/if_xae.c

906

PHY1_WR(sc, MII_BMCR,

sys/dev/xl/xlphy.c

182

PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);