LGE_MODE1
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_UCAST|
CSR_WRITE_4(sc, LGE_MODE1,
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_PROMISC);
CSR_WRITE_4(sc, LGE_MODE1,
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_BCAST);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RMVPAD);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ERRPKTS);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_GIANTS);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_TX_FLOWCTL);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_FLOWCTL);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_CRC);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_MPACK_ENB);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_VLAN_RX|LGE_MODE1_VLAN_TX|
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_GMIIPOLL);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_ENB);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_TX_ENB);
CSR_WRITE_4(sc, LGE_MODE1,
CSR_WRITE_4(sc, LGE_MODE1,
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ENB|LGE_MODE1_TX_ENB);
CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_MCAST);
LGE_SETBIT(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_SOFTRST);
if (!(CSR_READ_4(sc, LGE_MODE1) & LGE_MODE1_SOFTRST))