sys/dev/clk/starfive/jh7110_clk_aon.c

53

JH7110_GATE(JH7110_AONCLK_GMAC0_AXI, "gmac0_axi", gmac0_axi_p),

sys/dev/clk/starfive/jh7110_clk_aon.c

54

JH7110_GATE(JH7110_AONCLK_GMAC0_AHB, "gmac0_ahb", gmac0_ahb_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

68

JH7110_GATE(JH7110_STGCLK_USB0_APB, "usb0_apb", usb0_apb_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

69

JH7110_GATE(JH7110_STGCLK_USB0_UTMI_APB, "usb0_utmi_apb",

sys/dev/clk/starfive/jh7110_clk_stg.c

71

JH7110_GATE(JH7110_STGCLK_USB0_AXI, "usb0_axi", usb0_axi_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

74

JH7110_GATE(JH7110_STGCLK_USB0_APP_125, "usb0_app_125", usb0_app_125_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

77

JH7110_GATE(JH7110_STGCLK_PCIE0_AXI_MST0, "pcie0_axi_mst0",

sys/dev/clk/starfive/jh7110_clk_stg.c

79

JH7110_GATE(JH7110_STGCLK_PCIE0_APB, "pcie0_apb", pcie0_apb_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

80

JH7110_GATE(JH7110_STGCLK_PCIE0_TL, "pcie0_tl", pcie0_tl_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

81

JH7110_GATE(JH7110_STGCLK_PCIE1_AXI_MST0, "pcie1_axi_mst0",

sys/dev/clk/starfive/jh7110_clk_stg.c

84

JH7110_GATE(JH7110_STGCLK_PCIE1_APB, "pcie1_apb", pcie1_apb_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

85

JH7110_GATE(JH7110_STGCLK_PCIE1_TL, "pcie1_tl", pcie1_tl_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

86

JH7110_GATE(JH7110_STGCLK_PCIE_SLV_MAIN, "pcie_slv_main",

sys/dev/clk/starfive/jh7110_clk_stg.c

90

JH7110_GATE(JH7110_STGCLK_E2_CORE, "e2_core", e2_core_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

91

JH7110_GATE(JH7110_STGCLK_E2_DBG, "e2_dbg", e2_dbg_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

93

JH7110_GATE(JH7110_STGCLK_DMA1P_AXI, "dma1p_axi", dma1p_axi_p),

sys/dev/clk/starfive/jh7110_clk_stg.c

94

JH7110_GATE(JH7110_STGCLK_DMA1P_AHB, "dma1p_ahb", dma1p_ahb_p),

sys/dev/clk/starfive/jh7110_clk_sys.c

100

JH7110_GATE(JH7110_SYSCLK_APB0, "apb0", apb0_p),

sys/dev/clk/starfive/jh7110_clk_sys.c

101

JH7110_GATE(JH7110_SYSCLK_IOMUX_APB, "u0_sys_iomux_apb",

sys/dev/clk/starfive/jh7110_clk_sys.c

103

JH7110_GATE(JH7110_SYSCLK_UART0_APB, "u0_dw_uart_clk_apb",

sys/dev/clk/starfive/jh7110_clk_sys.c

105

JH7110_GATE(JH7110_SYSCLK_UART0_CORE, "u0_dw_uart_clk_core",

sys/dev/clk/starfive/jh7110_clk_sys.c

107

JH7110_GATE(JH7110_SYSCLK_UART1_APB, "u1_dw_uart_clk_apb",

sys/dev/clk/starfive/jh7110_clk_sys.c

109

JH7110_GATE(JH7110_SYSCLK_UART1_CORE, "u1_dw_uart_clk_core",

sys/dev/clk/starfive/jh7110_clk_sys.c

111

JH7110_GATE(JH7110_SYSCLK_UART2_APB, "u2_dw_uart_clk_apb",

sys/dev/clk/starfive/jh7110_clk_sys.c

113

JH7110_GATE(JH7110_SYSCLK_UART2_CORE, "u2_dw_uart_clk_core",

sys/dev/clk/starfive/jh7110_clk_sys.c

115

JH7110_GATE(JH7110_SYSCLK_UART3_APB, "u3_dw_uart_clk_apb",

sys/dev/clk/starfive/jh7110_clk_sys.c

117

JH7110_GATE(JH7110_SYSCLK_UART3_CORE, "u3_dw_uart_clk_core",

sys/dev/clk/starfive/jh7110_clk_sys.c

123

JH7110_GATE(JH7110_SYSCLK_NOC_BUS_STG_AXI, "noc_bus_stg_axi",

sys/dev/clk/starfive/jh7110_clk_sys.c

125

JH7110_GATE(JH7110_SYSCLK_AHB0, "ahb0", ahb0_p),

sys/dev/clk/starfive/jh7110_clk_sys.c

128

JH7110_GATE(JH7110_SYSCLK_SDIO0_AHB, "u0_dw_sdio_clk_ahb",

sys/dev/clk/starfive/jh7110_clk_sys.c

130

JH7110_GATE(JH7110_SYSCLK_SDIO1_AHB, "u1_dw_sdio_clk_ahb",

sys/dev/clk/starfive/jh7110_clk_sys.c

143

JH7110_GATE(JH7110_SYSCLK_GMAC0_GTXC, "gmac0_gtxc", gmac0_gtxc_p),

sys/dev/clk/starfive/jh7110_clk_sys.c

147

JH7110_GATE(JH7110_SYSCLK_GMAC1_AHB, "gmac1_ahb", gmac1_ahb_p),

sys/dev/clk/starfive/jh7110_clk_sys.c

153

JH7110_GATE(JH7110_SYSCLK_GMAC1_AXI, "gmac1_axi", gmac1_axi_p),

sys/dev/clk/starfive/jh7110_clk_sys.c

154

JH7110_GATE(JH7110_SYSCLK_GMAC1_GTXC, "gmac1_gtxc", gmac1_gtxc_p),