sys/arm64/arm64/gicv5_its.c

71

#define ITS_IDR0_PA_RANGE_MASK (0xfu << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

72

#define ITS_IDR0_PA_RANGE_4G (0x0u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

73

#define ITS_IDR0_PA_RANGE_64G (0x1u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

74

#define ITS_IDR0_PA_RANGE_1T (0x2u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

75

#define ITS_IDR0_PA_RANGE_4T (0x3u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

76

#define ITS_IDR0_PA_RANGE_16T (0x4u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

77

#define ITS_IDR0_PA_RANGE_256T (0x5u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

78

#define ITS_IDR0_PA_RANGE_4P (0x6u << ITS_IDR0_PA_RANGE_SHIFT)

sys/arm64/arm64/gicv5_its.c

79

#define ITS_IDR0_PA_RANGE_64P (0x7u << ITS_IDR0_PA_RANGE_SHIFT)