sys/arm64/include/armreg.h

1010

#define ID_AA64ISAR0_EL1_ISS ISS_MSR_REG(ID_AA64ISAR0_EL1)

sys/arm64/include/armreg.h

1112

#define ID_AA64ISAR1_EL1_ISS ISS_MSR_REG(ID_AA64ISAR1_EL1)

sys/arm64/include/armreg.h

1231

#define ID_AA64ISAR2_EL1_ISS ISS_MSR_REG(ID_AA64ISAR2_EL1)

sys/arm64/include/armreg.h

1316

#define ID_AA64MMFR0_EL1_ISS ISS_MSR_REG(ID_AA64MMFR0_EL1)

sys/arm64/include/armreg.h

1423

#define ID_AA64MMFR1_EL1_ISS ISS_MSR_REG(ID_AA64MMFR1_EL1)

sys/arm64/include/armreg.h

1533

#define ID_AA64MMFR2_EL1_ISS ISS_MSR_REG(ID_AA64MMFR2_EL1)

sys/arm64/include/armreg.h

1635

#define ID_AA64MMFR3_EL1_ISS ISS_MSR_REG(ID_AA64MMFR3_EL1)

sys/arm64/include/armreg.h

1722

#define ID_AA64MMFR4_EL1_ISS ISS_MSR_REG(ID_AA64MMFR4_EL1)

sys/arm64/include/armreg.h

1731

#define ID_AA64PFR0_EL1_ISS ISS_MSR_REG(ID_AA64PFR0_EL1)

sys/arm64/include/armreg.h

1847

#define ID_AA64PFR1_EL1_ISS ISS_MSR_REG(ID_AA64PFR1_EL1)

sys/arm64/include/armreg.h

1945

#define ID_AA64PFR2_EL1_ISS ISS_MSR_REG(ID_AA64PFR2_EL1)

sys/arm64/include/armreg.h

1954

#define ID_AA64ZFR0_EL1_ISS ISS_MSR_REG(ID_AA64ZFR0_EL1)

sys/arm64/include/armreg.h

2019

#define ID_ISAR5_EL1_ISS ISS_MSR_REG(ID_ISAR5_EL1)

sys/arm64/include/armreg.h

2151

#define MVFR0_EL1_ISS ISS_MSR_REG(MVFR0_EL1)

sys/arm64/include/armreg.h

2210

#define MVFR1_EL1_ISS ISS_MSR_REG(MVFR1_EL1)

sys/arm64/include/armreg.h

296

#define CNTPCT_EL0_ISS ISS_MSR_REG(CNTPCT_EL0)

sys/arm64/include/armreg.h

416

#define CTR_EL0_ISS ISS_MSR_REG(CTR_EL0)

sys/arm64/include/armreg.h

858

#define ID_AA64AFR0_EL1_ISS ISS_MSR_REG(ID_AA64AFR0_EL1)

sys/arm64/include/armreg.h

867

#define ID_AA64AFR1_EL1_ISS ISS_MSR_REG(ID_AA64AFR1_EL1)

sys/arm64/include/armreg.h

876

#define ID_AA64DFR0_EL1_ISS ISS_MSR_REG(ID_AA64DFR0_EL1)

sys/arm64/include/armreg.h

983

#define ID_AA64DFR1_EL1_ISS ISS_MSR_REG(ID_AA64DFR1_EL1)

sys/arm64/vmm/io/vgic_v3.c

1921

vm_register_reg_handler(vm, ISS_MSR_REG(ICC_SGI1R_EL1),