Symbol: MISC_REG_AEU_GENERAL_ATTN_6
sys/dev/bxe/ecore_reg.h
384
#define MISC_REG_AEU_GENERAL_ATTN_6 \
sys/dev/qlnx/qlnxe/reg_addr.h
36386
#define MISC_REG_AEU_GENERAL_ATTN_6 0x008418UL //Access:RW DataWidth:0x1 // Set/clr general attention 6; this will set/clr bit 54 in AEU vector.